Specifications
The
interrupt output
of
the 53C80 can optionally
be
connected
to
the IRQ5 system interrupt
via a
jumper
(W6),
as
this is optionally
supported
by
the
Ampro
SCSI/BIOS.
The
53C80's
DMA
request output
signal
normally connects
to
DMA
channel
DRQ3
via
a
jumper
(W2),
but
can
alternatively
be
connected
to
DRQ1
if
necessary.
See
Chapter
2 for
jumpering
information.
Socketed
220/330
ohm
bus
termination
is provided
on
the
board,
as
well as a
jumper
for
optionally powering the SCSI "TERMPWR" external termination option. Note that
no
on-
board
diode
protection
is
provided
between
the
board's
+
5V
power
and
the
SCSI
TERMPWR
line, so the option should
be
used with caution.
The
4-bit SCSI Initiator ID, used by the ROM-BIOS, is
read
in
the least significant three bits
of
a read-only input port,
at
I/O
address 338h.
The
remaining five bits
in
this
8-bit input
port
are
used
for
other
purposes
(serial handshake input
and
floppy drive configuration).
The
three
SCSI
10
bits reflect
the
state
of
three
jumpers
on
the
board,
W23-W25.
When
a
jumper
is on,
the
corresponding
bit
will
be
read
as
a 0; when a
jumper
is off,
the
bit
will
be
read
as a logic
1.
If
the
SCSI subsystem is
not
used,
the
three
10
bits, as
programmed
by
their respective jumpers,
are
available for other purposes.
4.7
PC
BUS
INTERFACE
An
I/O
channel compatible with the PC bus found
on
standard PC's is provided
on
a 64-pin
dual-row
header
connector
labeled
"J9"
on
the
board.
This
I/O
channel contains
an
8-bit
bidirectional
data
bus, 20 address lines, 6 levels
of
interrupt, three
DMA
channel handshake
lines, a number
of
other control lines,
and
power
and
ground for expansion cards.
To
a great degree, the signals
on
this interface match their
PC
counterparts. However, since
the Little
Board/PC
uses a 7.16
MHz
clock
and
the standard
PC
uses a 4.77
MHz
clock, there
are
some
timing differences.
By
choosing
the
number
of
memory
and
I/O
wait states,
the
board's
PC
Expansion Bus can
be
made to approximate
the
timing
of
the bus
of
a standard
4.77
MHz
PC. See
the
section
on
wait states, earlier
in
this
chapter, and Chapter 5 for addi-
tional programming information.
The
V40's 7.16
MHz
clock is
brought
out
to
the
PC
Expansion Bus as
the
"CLOCK" signal
(pin B20). Specifications
on
the
standard
PC
indicate
that
this signal
can
be
used
for "syn-
chronization,"
but
the
actual signal frequency is
not
specified.
Most
standard
PC's provide
4.77 MHz, "ATs" provide 8 MHz, and "turbo" PC's often provide 7.16
MHz
or
8 MHz.
The
duty cycle
of
this
signal is also unspecified; the Little
Board/PC
supplies approximately 50%
duty cycle.
Another
bus
clock signal, "OSC"
(pin
B3O),
is generally specified
to
have a frequency
of
14.31818 MHz, a frequency chosen because it is a useful timebase for video controllers.
The
mM
"AT"
computer provides this signal, even though it serves
no
specific purpose
on
the
AT
motherboard.
The
synchronization
of
this clock signal is
not
specified,
and
expansion
card
designers generally
do
not count
on
its being synchronous with any other
PC
bus
signal.
In
the Little
Board/PC
this signal is 14.31818 MHz, with a duty cycle
of
approximately 50%.
In
standard PC's,
DMA
channel 0 is used to refresh DRAM.
The
request line for
DMA
0,
"DACKO," is
used
by
some
expansion cards
to
detect
when
refresh
is occurring.
The
Little
Board/PC
provides its onboard refresh signal, generated
by
the refresh controller within the
V40,
on
this same PC bus pin, providing the necessary DACKO signal.
4-14