Specifications
4.4.3
DMA
Controller
The V40
CPU
has four independent DMA channels. They provide full
2O-bit
address regis-
ters and 16-bit byte count registers.
In
addition the V40's
DMA
controller features:
• Three types
of
transfer modes: single byte, demand, and block.
• Two types
of
bus access priority modes: release and hold.
• Two types
of
channel access priority:
fIXed
and rotating
• Automatic channel reinitializing.
The modes and methods used to program the V40's
DMA
controller are described in detail in
the V40's
User's Manual.
Although
the V40
DMA
controller's
2O-bit
address registers are useful in directly accessing
the system's full memory space, this and other slight differences from a standard PC's 8237A
DMA
controller would tend to result in incompatibilities with PC software that attempts to
directly access the DMA controller's internal registers.
To
make the Little
Board/PC's
DMA
"compatible", special hardware (in
ASICl)
has
been
included, which masks the differences between the V40's
DMA
controller
and
the
8237A
DMA
controller used
on
a standard PC.
This
"8237A emulation" is completely transparent to
software, with
the
result
that
software that runs
on
PC's
and
compatibles
can
run
without
modification
on
the Little Board/PC.
8237 A
EmulatiOn
To
accommodate the board's 8237A emulation. the V40's
DMA
controller registers are actu-
ally located at unique
I/O
port addresses, rather than
at
the
I/O
addresses normally occupied
by the
PC's 8237A
DMA
controller (see Chapter 5). The 8237A emulation logic recognizes
CPU
accesses
to
the
DMA
controller and issues
an
NMI (non-maskable
interrupt).
The
board's
PC
compatible ROM-BIOS detects when NMI's are generated by access to the
DMA
controller (as opposed to other NMI sources) and converts the 8237A-like
DMA
controller
software sequences into proper V40
DMA
controller accesses.
DMA
Channel
Mapping
Because the V40's DMA Channel 4 shares several pins with its internal serial port, the two
functions cannot both
be
used simultaneously.
On
the Little Board/PC, the serial port option
rather than the
DMA
Channel 4 option is implemented. Therefore only channels
0,
I, and 2
of
the V40's
DMA
controller are available for use in system
I/O.
Similarly, the standard PC's
8237A
DMA
controller provides four DMA channels, but only three
of
these are available for
use in system
I/O
because
DMA
channel 0 is used for
DRAM
refresh.
Consequently,
to
provide
PC
DMA
channel compatibility, the Little
Board/PC's
8237A
emulation logic and software perform a second function. which
is to remap the three available
V40
DMA
channels
(0,1,
and 2) into the three required
PC
DMA
channel assignments
(I,
2,
and 3). This is illustrated in Table 4-1.
4.£