Specifications
4.3
CPU
AND
GENERAL
ARCHITECTURE
The V40 CPU, operating
at
a 7.16 MHz clock frequency, is the central element in the Little
Board/PC.
It
supports a superset of the Intel 8088/8086 microprocessor instructions, includ-
ing compatibility with the 80188/80186 extensions.
The V40 also provides
an
8080 emulation
mode which allows it to execute 8-bit 8080 programs.
The
V40
CPU
can
directly address 1 megabyte
of
memory
via 20 address lines.
The
V40's
address, data, and control signals are demultiplexed by a set
of
latches, buffers, and part
of
an
application specific IC, "ASIC!'"
The
demultiplexed addresses form
the
internal
system
address bus, and are also brought out directly
to
the
PC
bus as the system address lines. The
demultiplexed
data
lines
are
distributed as
an
internal system
data
bus.
On
this internal
system bus are the three byte-wide memory sockets, three SIMM
DRAM
modules, and the
printer, keyboard, and speaker interfaces.
Buffers and control logic, including a second application specific IC ("ASIC2"), generate the
board's "PC Expansion
Bus"
interface.
In
addition to its function as a system expansion bus,
the
PC
Expansion Bus is also utilized as
an
onboard
bus, for access
to
three
key
onboard
peripheral
interface subsystems: the floppy disk interface; the SCSI bus interface
and
ID
port; and the
PC
serial port.
4.4
V40
INTERNAL
PERIPHERALS
In
addition
to
its function as
an
8088/8086/8080 compatible
CPU,
the V40 provides a sub-
stantial
portion
of
the
CPU
peripheral functions
needed
to
make up the
PC
architecture.
These include:
• Interrupt controller
• Counter/timers
•
DMA
controller
•
DRAM
refresh controller
• Programmable wait state generator
• Full duplex asynchronous serial port
All of these peripheral devices are completely internal to the
V40. They are configured and
accessed by reading
and
writing a set
of
reserved
I/O
ports. These internal V40 devices
(except the serial port) are described further in the following paragraphs.
The
serial port is
described later
in
this chapter.
4-4