TECHNICAL USER'S MANUAL FOR: EBX-Standard Pentium Littleboard MSLB_P5 Low Power Product #190899-1 Nordstrasse 11/F, CH-4542 Luterbach Tel.
DIGITAL-LOGIC AG MSLB_P5 Manual V0.3 No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, in any form or by any means, electronic, mechanical, optical, manual, or otherwise, without the prior written permission of DIGITAL-LOGIC AG. The software described herein, together with this document, are furnished under a license agreement and may be used or copied only in accordance with the terms of that agreement. REVISION HISTORY: Prod.
DIGITAL-LOGIC AG MSLB_P5 Manual V0.3 Table of Contents 1 PREFACE ....................................................................................................................... 7 1.1 1.2 1.3 1.4 1.5 1.6 2 Trademarks..................................................................................................................7 Disclaimer ....................................................................................................................7 Who should use this Product...........
DIGITAL-LOGIC AG MSLB_P5 Manual V0.3 4.7.3 EEPROM saved CMOS setup.................................................................................. 55 4.7.4 BIOS Download Function ....................................................................................... 55 4.7.5 VGA BIOS Download Function............................................................................... 56 4.8 Memory..............................................................................................................
DIGITAL-LOGIC AG 11 MSLB_P5 Manual V0.3 INSTALLING THE FLASHDISK DOC2000 ..........................................................126 11.1 Enabling and Formatting of the DiskOnChip-Modules......................................126 12 BUILDING A SYSTEM..............................................................................................127 12.1 Starting up the System...........................................................................................127 12.2 Error on boot time ...........
DIGITAL-LOGIC AG MSLB_P5 Manual V0.3 16.6.1 BIOS32 Service Directory..................................................................................... 164 16.6.2 Interrupt 10h–Video Services............................................................................... 166 16.6.3 Interrupt 11h–Return System Information............................................................ 168 16.6.4 Interrupt 12h–Return Memory Size ...................................................................... 168 16.6.
DIGITAL-LOGIC AG 1 MSLB_P5 Manual V0.3 PREFACE This manual is for integrators and programmers of systems based on the MICROSPACE card family. It contains information on hardware requirements, interconnections, and details of how to program the system. The specifications given in this manual were correct at the time of printing; advances mean that some may have changed in the meantime.
DIGITAL-LOGIC AG MSLB_P5 Manual V0.3 1.4 Recycling Information Hardware: - Print: Software: epoxy with glass fiber wires are of tin-plated copper - Components: ceramics and alloys of gold, silver check your local electronic recycling - no problems: re-use the diskette after formatting 1.5 Technical Support 1. Contact your local Digital-Logic Technical Support in your country. 2. Use Internet Support Request form on http://www.digitallogic.ch -> support 3.
DIGITAL-LOGIC AG 2 MSLB_P5 Manual V0.3 OVERVIEW 2.1 Standard Features The MICROSPACE PC is a miniaturized modular device incorporating the major elements of a PC/AT compatible computer.
2.3 Block Diagram CPU 2.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 2.4 MSLB-P5 Specifications CPU: CPU 64 Bit: CPU 16 Bit: Mode: Compatibility: Word Size: Physical Addressing: Virtual Addressing: Clock Rates: Socket Standard: Pentium 166MHz / 266MHz none Real / Protected 8086 – Pentium 32 Bits 32 lines 16 Gbytes 166 MHz BGA, 3.3V, 1.8V switched, 2.5V linear 3.3V linear) 2nd. Level Cache: available 256k onboard, burst pipelined SRAM for max. performance PC-Chipset: Intel TX430 8237A comp.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Video Input: (option) Controller: BUS: Videoinput Norm: Driversupport: Resolution: Capture speed: PAL/NTSC Decoder: Y-C resolution: RGB resolution: 69000 from C&T 32 Bit highspeed 33 MHz PCI bus 3 channels with PAL or NTSC (composite video sources = CVBS) 2 channels YC sources (=SVHS) 2 channels CVBS and 1 channel SVHS this configuration may be programmed into the SAA7111 WIN95, under development for NT4.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Sound I/O: (option) Controller: Driver Support: Output channels: Input: Features: ESS1869 8Bit Soundblaster compatible WIN 3.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Physical Characteristics: Dimensions: Weight: PCB Thickness: PCB Layer: Length: 204 mm Depth: 140 mm Height: 40 mm 300gr 1.6 mm / 0.0625 inches nominal 10 with separate ground and VCC plane for low noise Operating Environment: Relative humidity: Vibration: Shock: Temperature: 5 - 90% non condensing 5 to 2000 Hz 10 G Operating: Standard version: -25°C to +70°C Enhanced temp.
DIGITAL-LOGIC AG 2.5 MSLB-P5 Manual V0.3 Thermoscan Product: PRELIMINARY MSLB-P5 Scan time: 15 60min.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 2.6 Ordering Codes MSLB-P5 MICROSPACE PCCard without CPU, with 256k Cache no Options Option - E Option - S Option - A LAN 100/10BASE-T Option SCSI-2 Audio Sound Interface 2.
DIGITAL-LOGIC AG 2.8 MSLB-P5 Manual V0.3 This product is “YEAR 2000 CAPABLE” This DIGITAL-LOGIC product is “YEAR 2000 CAPABLE”. This means, that upon installation, it accurately stores, displays, processes, provides and/or receives date data from, into, and between 1999 and 2000, and the 20. and 21. centuries, including leap year calculations, provided that all other technology used in combination with said product properly exchanges date data with it.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 2.9 High frequency Radiation (to meet EN55022) Since the boards are very high integrated embedded computers, no peripheral lines are protected against the radiation of high frequency spectrum. To meet a typical EN55022 requirement, all peripherals, they are going outside of the computer case, must be filtered externaly.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 2.10 Mechanical Dimensions 2.10.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 2.10.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 2.10.
DIGITAL-LOGIC AG 3 MSLB-P5 Manual V0.3 T HE PCI, ISA , EPCI AND PC/104 B US SIGNALS 3.1 ISA Signals on the PC/104 and ISA-Bus AEN, output Address Enable is used to degate the microprocessor and other devices from the I/O channel to allow DMA transfers to take place. low = CPU Cycle , high = DMA Cycle BALE, output Address Latch Enable is provided by the bus controller and is used on the system board to latch valid addresses and memory decodes from the microprocessor.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 I/O Write instructs an I/O device to read the data on the data bus. It may be driven by any microprocessor or DMA controller in the system. This signal is active low .
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 IRQ[ 3 - 7, 9 - 12, 14, 15], input These signals are used to tell the microprocessor that an I/O device needs attention. An interrupt request is generated when an IRQ line is raised from low to high. The line must be held high until the microprocessor acknowledges the interrupt request . /Master, input This signal is used with a DRQ line to gain control of the system.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 SD[O..15], input/output These signals provide bus bits 0 through 15 for the microprocessor, memory, and I/0 devices. DO is the least-significant bit and D15 is the most significant bit. All 8-bit devices on the I/O channel should use DO through D7 for communications to the microprocessor. The 16-bit devices will use DO through D15.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 3.2 Connect PCI peripheral cards to the PC/104plus BUS: Internal used PCI-Signals: LAN: SCSI: A_D29, IRQA, REQ1, GNT1 A_D30, IRQB, REQ2, GNT2 Signals: PC/104plus: Master 1.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 3.3 EBX Specification — Ver 1.1 — July 9, 1997 1. INTRODUCTION Until now, embedded system designers had to choose among off-the-shelf backplane solutions, desktop motherboards, and proprietary designs. Size and power consumption constraints hampered finding the right solutions for embedded deployment. Consequently, OEMs wanting to purchase off-the-shelf equipment to shorten time-to-market were often forced to develop proprietary solutions.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 This EBX system expansion is based on popular existing industry standards — IEEE P996, PC/104?, PCI, PC/104-Plus?, and PCMCIA. IEEE P996 is the governing standard for the PC and PC/AT buses, informally known as the Industry Standard Architecture or “ISA.“ PC/104 places the P996 ISA bus on compact 3.6” x 3.8” modules with self-stacking capability. PC/104-Plus adds the power of a PCI bus to PC/104 while retaining the basic form-factor.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 2. REFERENCE DOCUMENTS This EBX specification makes reference to, and is based on, the current versions of the following specifications: IEEE P996 Draft Specification: IEEE Standards Office, Piscataway NJ; phone 908-562-3825, fax 908-562-1571. PC/104 and PC/104-Plus Specification: PC/104 Consortium, Mountain View CA; phone 415-903-8304, fax 415-967-0995.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4. VERTICAL CLEARANCE ZONES The EBX form-factor is subdivided into zones which are intended for various interfaces and components. Each of these zones, and their associated functions, are defined in Figures 2 and 3 (Appendix A) and are described below. Each zone has a specified vertical dimension within which all components of that zone must fit. Table 2 specifies the maximum component height within each EBX zone.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.1 Zone A: Memory Expansion Most EBX boards will require expansion memory, and this zone is recommended to allow the height profile necessary for industry standard SIMMs or DIMMs. 4.2 Zone B: Power Connector The 7-pin EBX power connector and external mating connector are located in this zone. Refer to Section 5 of this specification for further information. 4.3 Zone C: Video I/O (Option) Many EBX boards will provide onboard interface to CRT and/or flat panel displays.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 5. POWER CONNECTOR AND POWER REQUIREMENTS The EBX power connector is a 7-pin locking connector. Two options are supported, right-angle and straight, as illustrated in the figure below. The power connector options are Molex part number 26-60-7070 for the right-angle, and 26-60-4070 for the straight (or equivalent). Figures 2 and 3 in Appendix A define the region where the power connector and its mating cable connector must be located.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 3.3.
DIGITAL-LOGIC AG PRELIMINARY MSLB-P5 Manual V0.
DIGITAL-LOGIC AG 4 MSLB-P5 Manual V0.3 DETAILED S YSTEM DESCRIPTION This system has a system configuration based on the ISA architecture. Check the I/O and the Memory map in this chapter. 4.1 Power Requirements The power is connected through the ISA Bus connector, or the PC/104 Power connector, or the separate power connector on the board. The supply uses only +5V and ground connection. For backplane supply and the Flash BIOS operation, the user has to connect the 12V (only for LCD port).
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.3 Interface 4.3.1 PS/2-Keyboard Standard PS2-Keyboard , also available on the utilityconnector 4.3.2 PS/2-Mouse Interface Standard PS/2 conector , also available on the utilityconnector 4.3.3 Line Printer Port LPT1 A standard bi-directional LPT port is integrated into the MICROSPACE PC, with DMA7 support.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.3.4 Serial Ports COM1-COM4 RS232C Select the RS232C Interface with: J108: J109: 2-3 2-3 Select COM3 = RS232C Select COM4 = RS232C J115: J114: 2-3 2-3 Select COM3 = IRQ10 Select COM4 = IRQ11 (1-2 = IRQ4 *) (1-2 = IRQ3 *) *) if IRQ3/4 used, the driver must handle the shared IRQ3/4 with the COM1/2 ! The serial channels are fully compatible with 16C550 UARTS. COM1 is the primary serial port, and is supported by the board's ROM-BIOS as the PC-DOS 'COM1' device.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.3.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Summary If the UART should transmit, then set the Bit RTS in the modem control register to ‘0’ and the DTR to ‘1’ befor the databyte is sent to the transmit register. If the UART should receive, wait on the receive buffer full flag as usual. Nothing special must be done, since the RS422/485 receiver is always enabled. FUNCTION TABLES ADM489 Transmitting INPUTS /RE = RTSx 0 0 0 0 Line Condition TE=DTRx 1 1 0 1 DI 1 0 X X INPUTS TE=DTRx 1 1 A-B ≥ + 0.2V ≤ - 0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.3.7 Driver for COM3-COM4 RS422/485 In the case of RS422 /485 a driver must handle the RTS and DTR control signall, to prevent of buscollisions and to become a proper bus access. This driver s must be programmed operating system dependent and/or application dependent.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.3.8 Floppy disk interface The onboard floppy disk controller and ROM-BIOS support one or two floppy disk drives in any of the standard PC-DOS and MS-DOS formats shown in the table . 2.88mb floppy are not supported. 4.3.8.1 Supported floppy formats Capacity Drive size Tracks Data rate DOS version 1.2 MB 720 K 1.44 M 5-1/4" 3-1/2" 3-1/2" 80 80 80 500 KHz 250 KHz 500 KHz 3.0 - 6.22 3.2 - 6.22 3.3 - 6.22 4.3.8.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.4 Controllers 4.4.1 Interrupt Controllers An 8259A compatible interrupt controller, within the chipset device, provides seven prioritized interrupt levels. Of these, several are normally associated with the board's onboard device interfaces and controllers, and several are available on the AT expansion bus.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.5.2 Battery backed clock (RTC) An AT compatible date/time clock is located within the chipset. The device also contains a CMOS static RAM, compatible with that in standard ATs. System configuration data is normally stored in the clock chip's CMOS RAM in a manner consistent with the convention used in other AT compatible computers. One unique feature of the board's battery-backed clock device is that it contains the backup battery directly on the board.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.6 BIOS 4.6.1 ROM-BIOS Sockets An EPROM socket with 8 Bit wide data access normally contains the board's AT compatible ROMBIOS. The socket takes any of a 27C010 to 29F010 EPROM (or equivalent) device. The board's waitstate control logic automatically inserts four memory wait states in all CPU accesses to this socket.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.6.2 EEPROM Memory for Setup The EEPROM is used for setup and configuration data, stored as an alternative to the CMOS-RTC. Optionally, the EEPROM setup driver may update the CMOS RTC, if the battery is running down, the checksum error would appear and stop the system. The capacity of the EEPROM is 2048 Bytes.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.6.3 BIOS CMOS Setup If wrong setups are memorized in the CMOS-RAM, the default values will be loaded after resetting the RTC/CMOS-RAM with the CMOS-RESET jumper. If the battery is down, it is always possible to start the system with the default values from the BIOS.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.7 CMOS RAM Map Systems based on the industry-standard specification include a battery backed Real Time Clock chip. This clock contains at least 64 bytes of non-volatile RAM. The system BIOS uses this area to store information including system configuration and initialization parameters, system diagnostics, and the time and date. This information remains intact even when the system is powered down. The BIOS supports 128 bytes of CMOS RAM.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG CMOS Map MSLB-P5 Manual V0.3 Continued... Location Description 0Eh CMOS Location for Bad CMOS and Checksum Flags bit 7 = Flag for CMOS Lost Power 0 1 bit 6 = = Power OK Lost Power = Flag for CMOS checksum bad 0 1 = = 0Fh Shutdown Code 10h Diskette Drives bits 7-4 = Diskette Drive A 0000 0001 0010 0011 0100 0101 = = = = = = Checksum is valid Checksum is bad Not installed Drive A = 360 K Drive A = 1.2 MB Drive A = 720 K Drive A = 1.44 MB Drive A = 2.
DIGITAL-LOGIC AG CMOS Map MSLB-P5 Manual V0.3 Continued...
DIGITAL-LOGIC AG CMOS Map MSLB-P5 Manual V0.3 Continued...
DIGITAL-LOGIC AG CMOS Map MSLB-P5 Manual V0.3 Continued...
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.7.1 CMOS Setup Harddisk list Harddisk parameter selection Since the BIOS autodetects the harddisk type, no HD-drive parameter table is used. Go into the BIOS-HD-Setup and press autodetect. The parameters are read out of the IDE harddisk and stored in the CMOS memory. 4.7.2 Harddisk PIO Modes Block Mode (Multi-Sector) Transfer: Block mode boots IDE drive performance by increasing the amount of data transferred.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.7.3 EEPROM saved CMOS setup The EEPROM has different functions, as listed below: • • • Backup of the CMOS-Setup values. Storing system informations like: version, production date, customisation of the board, CPU type. Storing user/application values. The EEPROM will be updated automatically after exiting the BIOS setup menu. The system will operate also without any CMOS battery. While booting up, the CMOS is automatically updated with the EEPROM values.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.7.5 VGA BIOS Download Function The BIOS for the VGA must be downloaded, before an LCD is connected. This could be also a new LCD-Display, which needs a corresponding VGA BIOS. The following points must be checked before downloading a BIOS: - Select the Shadow option in the BIOS for BIOS and VGA (if this option is available). - Disable the EMM386 or other memory managers in the CONFIG.SYS of your bootdisk. - Make sure, that the DOWN_000.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.8 Memory 4.8.1 Onboard DRAM Memory Speed: Size: Bits: Capacity: Bank: 60ns soldered 64bit chips 64 Bit 32 MBytes, 64 MBytes allways two banks must be equipped 4.8.2 System Memory Map The CPU used as a central processing unit on the MICROSPACE PC has a memory address space which is defined by 32 address bits. Therefore, it can address 1GByte of memory.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.8.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG I/O Address Read/Write Status MSLB-P5 Manual V0.3 Description 00A0h - 00A1h are reserved for the slave programmable interrupt controller. The bit definitions are identical to those of addresses 0020h - 0021h except where indicated.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG I/O Address Read/Write Status MSLB-P5 Manual V0.3 Description I/O addresses 02F8h - 02FFh are reserved for use with serial port 2. See the bit definitions for I/O addresses 03F8h - 03FFh.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 I/O Address Read/Write Status Description 037Ah R/W Control port for parallel port 1 bits 7-5 = Reserved bit 4 = 1 Enable IRQ bit 3 = 1 Select printer bit 2 = 0 Initialize printer bit 1 = 1 Automatic line feed bit 0 = 1 Strobe 03B0h 03B8h R/W Various video registers I/O addresses 03BCh - 03BEh are reserved for use with parallel port 3. See the bit definitions for addresses 0378h - 037Ah.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 I/O Address Read/Write Status Description 03F8h R/W Baud rate divisor (low byte) - This byte along with the high byte (03F9h) store the data transmission rate divisor. bits 7-0 = Data bits 0-7 when the Divisor Latch Access Bit (DLAB) is 1 03F9h R/W Baud rate divisor (high byte) - This byte along with the low byte (03F8h) store the data transmission rate divisor.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.9 BIOS Data Area Definitions The BIOS Data Area is an area within system RAM that contains information about the system environment. System environment information includes definitions associated with hard disks, diskette drives, keyboard, video, as well as other BIOS functions. This area is created when the system is first powered on. It occupies a 256-byte area from 0400h - 04FFh.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 BIOS Data Area Definitions Continued...
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 BIOS Data Area Definitions Continued...
DIGITAL-LOGIC AG BIOS Data Area Definitions MSLB-P5 Manual V0.3 Continued... Location Description 50h - 5Fh Position of cursor for each video page. Current cursor position is stored two bytes per page. First byte specifies the column, the second byte specifies the row. 60h - 61h Start and end lines for 6845-compatible cursor type. = starting scan line, 61h = ending scan line.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 BIOS Data Area Definitions Continued...
DIGITAL-LOGIC AG BIOS Data Area Definitions MSLB-P5 Manual V0.3 Continued... Location Description 92h - 93h Scratch area for diskette media. Low byte for drive A, high byte for drive B. 94h - 95h Current track number for both drives. Low byte for drive A, high byte for drive B.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.9.1 Compatibility Service Table In order to ensure compatibility with industry-standard memory locations for interrupt service routines and miscellaneous tabular data, the BIOS maintains tables and jump vectors.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.10 VGA, LCD 4.10.1 VGA / LCD Controller C&T69000 (optional C&T69030) 69000 High Performance Flat Panel / CRT HiQVideo TM Accelerator with Integrated Memory • Highly integrated Flat Panel and CRT GUI Accelerator & Multimedia Engine, Palette/DAC, Clock Synthesizer, and integrated frame buffer • Integrated High performance SDRAM memory.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 High Performance Integrated Memory The integrated SDRAM memory can support up to 83MHz operation, thus increasing the available memory bandwidth for the graphics subsystem. The result is support for additional high color / high resolution graphics modes combined with real-time video acceleration. This additional bandwidth also allows more flexibility in the other graphics functions intensely used in Graphics User Interface (GUIs) TM TM such as Microsoft Windows .
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.10.4 VGA/LCD BIOS Support Each LCD display needs a specific adapted VGA-BIOS. Standard this product is equiped with the CRT standard VGABIOS. To connect a LCD Display to this product, you need to perform the following: 1. Check the FP_LIST.PDF if the LCD BIOS is available. Ask DIGITAL-LOGIC to get the latest VGA-BIOS file ! IF THE LCD BIOS IS AVAILABLE: 2. In the FLATPANEL-SUPPORT documentation the connection between the LCD and this product will be described. 3.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.10.5 Memory 69000 CRT/TFT Panels Hor. Resol. Vert. Resol. 640 640 640 640 480 480 480 480 8 8 8 8 60 72 75 85 25.175 31.500 31.500 36.000 300 300 300 300 4.2 4.2 4.2 4.2 0 0 0 0 640 640 640 640 480 480 480 480 16 16 16 16 60 72 75 85 25.175 31.500 31.500 36.000 600 600 600 600 4.2 4.2 4.2 4.2 640 640 640 640 480 480 480 480 24 24 24 24 60 72 75 85 25.175 31.500 31.500 36.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.10.6 Memory 69000 Color STN-DD Panels Hor. Resol. Vert. Resol. 640 640 640 640 480 480 480 480 8 8 8 8 60 72 75 85 25.175 31.500 31.500 36.000 300 300 300 300 4.2 4.2 4.2 4.2 120 120 120 120 640 640 640 640 480 480 480 480 16 16 16 16 60 72 75 85 25.175 31.500 31.500 36.000 600 600 600 600 4.2 4.2 4.2 4.2 640 640 640 640 480 480 480 480 24 24 24 24 60 72 75 85 25.175 31.500 31.500 36.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.10.7 Memory 69000 Mono STN-DD Panels Hor. Resol. Vert. Resol. Color bpp Refr. Hz DCLK Mhz MEM kByte Cursor FB/C kByte kByte 640 640 640 640 480 480 480 480 8 8 8 8 60 72 75 85 25.175 31.500 31.500 36.000 300 300 300 300 4.2 4.2 4.2 4.2 0 0 0 0 640 640 640 640 480 480 480 480 16 16 16 16 60 72 75 85 25.175 31.500 31.500 36.000 600 600 600 600 4.2 4.2 4.2 4.2 640 640 640 640 480 480 480 480 24 24 24 24 60 72 75 85 25.175 31.500 31.500 36.
DIGITAL-LOGIC AG 4.11 HiQ Video MSLB-P5 Manual V0.3 Multimedia Support The 69000 uses independent multimedia capture and display systems on chip. The capture system places data in display memory (usually off screen) and the display system places the data in a window on the screen. The capture system can receive data from the video portin the 422 YUV format. The YUV data are served from the VideoInputProcessor (VIP) type SAA7111A.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.11.1 HiQVideo Series Programming Examples 4.11.2 Introduction This application note shows how the CHIPS HiQVideo??Series controllers can be used for video capture and playback. This document includes a description of the hardware configuration, a discussion of the functions, and actual programming examples. 4.11.3 Video Playback through PCI/VL Bus The new generation of Chips and Technologies, Inc.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.11.6 Video Capture Using the Video Port We need some additional functions to manage video capture through video port. Some of the initialization and exit code can be merged together with the playback code. Capture code should also include the previously described playback code. 4.11.7 How to enable video capture and playback module (Init) This code should be executed before video starts flowing into the port. 1. Save and Set XRD0[4] = 1 2.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.11.8 How to disable video playback and capture module (Exit) 1. Restore XRD0. 2. Restore SAR04. UCHAR XR_Index; XR_Index = ReadPortUshort(ulXrAddr); // Save XR Index WritePortUshort(ulXrAddr,XRD0); // Restore XRD0 WritePortUshort(ulXrAddr,0x044e); // Read SAR04 WritePortUshortAddr,SAR04); // Restore SAR04 WritePortUchar(ulXrAddr,XR_Index); // Restore XR_Index 4.11.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.11.10 How to stop video capture //------------------------------------------------------------------------// FreezeVideo() : Stops capturing the incoming video; whatever is in the // frame buffer is being displayed.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.11.11 How to set input video color format CHIPS 69000 supports three basic color formats which are YUV4:2:2, RG555 and RGB565. Each format is 16 bit per pixel. The 69000 also allows swapping of the UV positions within a 32 bit dword. The default sequence for YUV4:2:2 is Byte0=Y0, Byte1=U, Byte2=Y1, Byte3=V. The following code shows the input video format selection.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.11.13 How to enable/disable double buffer CHIPS 69000 supports double buffering for the video capture and playback. Double buffering needs more memory but it minimizes the tearing effect generated by fast changing pictures. We assume that there is enough memory to accommodate both buffers and that the buffer address is programmed in (MR06, MR07, MR08, MR09, MR0A, MR0B). The following code sets/resets double buffering.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.11.15 How to crop input video (programming of acquisition rectangle) Video acquisition rectangle is used to crop the unwanted video input data before the 69000 hardware scales it and grabs it into off-screen buffer. This is also used to crop vertical blank interval data (Closed Caption or Tele Text) from the NTSC video. //------------------------------------------------------------------------// SetCropRect() : Sets cropping rectrangle on input video recctangle.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Definition of CHIPSMM.H /************************************************************************ * Description: Hardware register definitiona file for 6555x * * Copyright (C) Chips and Technologies, Inc.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 4.11.16 Video Input with the SAA7111 VIP The 69000 Series integrated configuration reguires only a NTSC/PAL decoder SAA7111 and standard DRAMs, without additional memory. The ITT decoder implements a 3 channel video multiplexer, which may be software controlled over the I2C bus. - Four analog inputs, internal analog source selectors, e.g.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Burst gate accumulator Colour identification and killer Comparison nominal/actual burst amplitude (PAL/NTSC standards only) Loop filter chrominance gain control (PAL/NTSC standards only) Loop filter chrominance PLL (only active for PAL/NTSC standards) PAL/SECAM sequence detection, H/2-switch generation Increment generation for DTO1 with divider to generate stable subcarrier for non-standard signals.
DIGITAL-LOGIC AG 5 MSLB-P5 Manual V0.3 DESCRIPTION OF THE CONNECTORS Flat cable 44pin IDE is: All others are: X29 IDT Terminal for Dual Row (2.00mm grid) and 1.00mm flat cable IDT Terminal for Dual Row 0.1" (2.54mm grid) and 1.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 X7 (primary) / X8 (secondary) IDE interface connector 44 pins RM2.
DIGITAL-LOGIC AG X20 X13 MSLB-P5 Manual V0.
DIGITAL-LOGIC AG X19 MSLB-P5 Manual V0.3 Printerport connector (LPT1) The printer connector provides an interface for 8 bit centronics printers.
DIGITAL-LOGIC AG X3 MSLB-P5 Manual V0.3 VGA-CRT connector (HiDens DSUB 15pin) * DDDA and DDCK are the DIGITAL-DISPLAY interface for power control functions of the monitor.
DIGITAL-LOGIC AG X4 MSLB-P5 Manual V0.3 5V - VGA-LCD (buffered signals) 50pin RM2.
DIGITAL-LOGIC AG X5 MSLB-P5 Manual V0.3 3.3V - VGA-LCD (unbuffered signals) 50pin RM2.00mm connector Pin Signal Function M-Clock Frame 12V/1A for Backlight Line pulse 3.
DIGITAL-LOGIC AG X6 X23 MSLB-P5 Manual V0.3 ZV-Port connector (26pin RM2.54) (if this option is assembled) Pin Signal Pin Signal Pin 2 Pin 4 Pin 6 Pin 8 Pin 10 Pin 12 Pin 14 Pin 16 Pin 18 Pin 20 Pin 22 Pin 24 Pin 26 Data1 Data 3 Data 5 Data 7 Data 9 Data 11 Data 13 Data 15 Vert.Ref VRDY SCL 3.3V GND Pin 1 Pin 3 Pin 5 Pin 7 Pin 9 Pin 11 Pin 13 Pin 15 Pin 17 Pin 19 Pin 21 Pin 23 Pin 25 Data 0 Data2 Data 4 Data 6 Data 8 Data 10 Data 12 Data 14 Horiz.Ref P-Clock SDA 5.
DIGITAL-LOGIC AG X2 X32 Utility connector Pin Function Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Pin 9 Pin 10 Pin 11 Pin 12 Pin 13 Pin 14 Pin 15 Pin 16 VCC PS/2 Mouse Data PS/2 Mouse Clock PS/2 Keyboard Data PS/2 Keyboard Clock Ground Resetinput Battery Input 3.0 to 3.
DIGITAL-LOGIC AG X31 X34 X33 MSLB-P5 Manual V0.3 Not used connector (6pin RM2.
DIGITAL-LOGIC AG X11 Dual USB Connector Pin Pin Pin Pin Pin Pin Pin Pin Pin X128 MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 5.1 Jumpers on this MICROSPACE product Jumper Locations on the Board The figure shows the location of all the jumper blocks on the PCC-P5 board. The numbers shown in this figure are silk screened on the board so that the pins can easily be located. This chapter refers to the individual pin for these jumpers. The default jumper settings are written in bold. Be careful when you change some jumpers.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 5.2 Jumper and Connector Locations 5.2.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 5.2.
DIGITAL-LOGIC AG 6 MSLB-P5 Manual V0.3 CABLE INTERFACE 6.1 The Floppy Disk Cable IDT Terminal for Dual Row 0.1" (2.54 mm grid) and 1.27 mm flat cable Floppydisk Cable 34pin MicroSpace 1 2 33 34 DRIVE B: 1 2 DRIVE A: 1 2 10 10 16 16 max. cable length = 400mm For drive A: the lines 10 to 16 are crossed (180 degrees). All floppy drives must be selected as drive number 2, because the cable assigns the drive letter A: or B: to the drives. The power must be connected separately.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 6.2 The Harddisk Cable 40 pins IDT terminal for dual row 0.1" (2.54 mm grid) and 1.27 mm flat cable. 40 pins signal, power is separately wired. Refer to the technical manual of the harddisk used. 1 2 1 2 39 40 39 40 Max. length for IDE cable is 30 cm. ATTENTION: A maximum of two IDE drives can be connected to the HD-Interfaces. The first drive must always be the MASTER drive (= C:) and the second is the SLAVE drive.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 6.3 The Harddisk Cable 44 pins IDT Terminal for Dual Row (2.00 mm grid) and 1.00 mm flat cable. 44 pins = 40 pins signal and 4 pins power. Pin spacing = 1mm 1 2 1 2 43 44 43 44 44 x 2mm pin spacing Max. length for the IDE cable is 30 cm. ATTENTION: Check the pin 1 marker of the cable and the connector before you power-on. See the technical manual of the drives used, because a wrong cable will immediately destroy the drive and/or the MICROSPACE PCC-P5L board.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 6.4 The COM 1/2 Serial Interface Cable DT terminal for dual row 0.1" (2.54 mm grid) and 1.27 mm flat cable Line of pin 1 1 2 6 7 8 9 COM1/2 9 1 2 3 4 COM1 9pin D-Sub male 5 10 ATTENTION: - - Do not short-circuit these signal lines. Never connect any pins either to the same plug or to any other plug on the MICROSPACE PCC-P5L. The +/-10Volt will destroy the MICROSPACE core logic immediately. No warranty in this case! Do not overload the output: max.
DIGITAL-LOGIC AG 7 MSLB-P5 Manual V0.3 SPECIAL PERIPHERALS, OPTIONAL FUNCTIONS 7.
DIGITAL-LOGIC AG 8 MSLB-P5 Manual V0.3 100/10 ETHERNET LAN Required programs and drivers are located in the directory \DRIVERS\NETWORK\82559\ Create a directory C:\LAN100 on your harddisk. Copy the programs and drivers of \DRIVERS\NETWORK\82559\ onto your HD. 1. 2. Load datas into EEPROM. Load with the command „EEUPDATE –ALL LAN100.EEP LAN100.DAT“ the datas of both files LAN100.EEP and LAN100.DAT into the EEPROM (in directory C:\LAN100\UTILITY\E2PROM) Run SETUP.EXE in C:\LAN100.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Driver Installation Windows 95 Copy Intel Pro100+ driver on HD. De-install all networkdrivers under Windows95 in system and software folders and restart Windows. Networkcard Pro10 PCI will be auto-detected and all drivers can be installed (of the copied directory). Restart Windows and ... failure messages. Call up the networkcard-preferences in the ... Systemsteuerung and update the drivers. Choose the Intel 8255x-based PCI Ethernet Adapter (10/100) out of the list.
DIGITAL-LOGIC AG 9 MSLB-P5 Manual V0.3 SCSI I NTERFACE ( OPTION) The SCSI-2 interface is realized with the AIC-7880 controller. This chip is fully supported by Adaptec Device Management System (SDMS) software, that supports the Advanced SCSI Protocol Interface (ASPI) and the ANSI Common Access Method (CAM). The AIC-7880 operates the SCSI bus at 5 MB/s asynchronously or 10 MB/s synchronously, and bursts data to the host at full PCI speed up to 110 MB/s (at 33 MHz).
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 9.
DIGITAL-LOGIC AG 10 MSLB-P5 Manual V0.3 SOUNDPORT DRIVER I NSTALLATION 10.1 ESS1869 To download the latest drivers at http://www.digitallogic.ch 10.2 Driver for WIN 3.11 Insert the DRIVER DISK FOR WIN3.1, after starting windows V3.1. Run „SETUP.EXE“ on the driver floppydisk A:. Choose „INSTALL“ for all the files to be loaded and system files to be modified. The setup utility allows a different directory to be choosen other than default „ C:\ADISOUND“ for copying.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 10.3 Driver for WIN 95 Win95 will recognize the new hardware by displaying a dialog box „New Hardware Found ESS1869“. Insert DRIVER DISK WIN95 into the floppydisk A:. Select the option „Driver from disk provided by hardware manufacturer“, and hit ENTER. In the next windows select the default driver and hit OK. Select the default driver also for the GAMEPORT. The DRIVER DISK WIN95 must be in the floppy drive and the correct drivers are loaded.
DIGITAL-LOGIC AG 11 MSLB-P5 Manual V0.3 INSTALLING THE FLASHDISK DOC2000 On the SSD 36pin socket a DiskOnChip DOC2000 module from M-Systems may be installed with a capacity of 512k to 12MByte. This device is available from DIGITAL-LOGIC AG. Operating Systems: DOS, DL-DOS, RTX-DOS, WIN 3.11, ROM-WIN are working with these drives. All other non DOS compatible systems need a driver. Give attention to the pin 1 orientation in the 32pin SSD socket. 11.
DIGITAL-LOGIC AG 12 MSLB-P5 Manual V0.3 BUILDING A S YSTEM To build a system based on the PCC-P5L board you must obtain the following equipment: - A chassis to hold all the system components. The board size is designed for EURO-RACKS 19" with 6HE. A power supply of 5V and 5- 10 Amps depending on the mass storage systems. 8 ohm speaker. A floppy disk drive (3,5" or 5,25") with a PC floppy cable (34 pin). You need at least one floppy to boot the first time.
DIGITAL-LOGIC AG 13 MSLB-P5 Manual V0.3 DIAGNOSTICS Check point Description Uncompressed INIT code check-points D0 D1 D3 D4 D5 D6 D7 NMI is Disabled. CPU ID saved. Init code Checksum verification starting. To do DMA init, Keyboard controller BAT test, start memory refresh and going to 4GB flat mode. To start Memory sizing. To come back to real mode. Execute OEM patch. Set stack. E000 ROM enabled. Init code is copied to segment 0 and control to be transfered to segment 0. Control is in segment 0.
DIGITAL-LOGIC AG 42 43 44 45 46 47 48 49 4B 4C 4D 4E 4F 50 51 52 53 54 57 58 59 60 62 65 66 7F 80 81 82 83 84 85 86 87 88 89 8B 8C 8D 8F 91 95 96 97 98 99 9A 9B 9C 9D 9E A2 A3 A4 A5 A7 A8 A9 AA AB B0 B1 00 MSLB-P5 Manual V0.3 To enter in virtual mode for memory test. To enable interrupts for diagnostics mode. To initialize data to check memory wrap around at 0:0. Data initialized. Going to check for memory wrap around at 0:0 and finding the total system memory size. Memory wrap around test done.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 The system BIOS gives control to the different BUSes at following check-points to performe various tasks on the different BUSes. CHECK-POINT DESCRIPTION OF CHECK-POINT 2A Different BUSes init (system, static, output devices) to start if present. 38 Different BUSes init (input, IPL, general devices) to start if present. 39 Display different BUSes initialization error messages. 95 Init of different BUSes optional ROMs from C800 to start.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 14 BIOS 14.1.1 Main Menu Selections You can make the following selections on the Main Menu itself. Use the sub menus for other selections. Feature System Time System Date Diskette 1 Diskette 2 System Memory Options HH:MM:SS MM/DD/YYYY 360 kB, 5 ¼" 1.2 MB, 5 ¼" 720 kB, 3 ½" 1.44/1.25 MB, 3 ½" 2.88 MB, 3 ½" Not installed Disabled N/A Extended Memory N/A Description Set the system time. Set the system date.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Use the legend keys listed on the bottom to make your selections and exit to the Main Menu. Use the following chart to configure the hard disk. Feature Type Options None 1 to 39 User Auto Cylinders Heads Sectors/Track Landing Zone* 1 to 2048 1 to 16 1 to 64 1 to 2048 Write Precomp* 1 to 2048 None Description 1 to 39 fills in all remaining fields with values for predefined disk type. See p. Fehler! Textmarke nicht definiert. "Fixed Disk Tables.
DIGITAL-LOGIC AG Feature External Cache Cache Interleave Cache Write Back Cache Read Cycles Options Enabled Disabled. Enabled Disabled Enabled Disabled Chipset Dependent Cache Write Cycles Chipset Dependent Cache System BIOS Enabled Disabled Enabled Disabled Enabled Disabled Cache Video BIOS Cache segments, e.g.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 14.1.4 Memory Shadow Selecting "System Shadow" or "Video Shadow" from the Main Menu displays a menu like the one shown here. The actual features displayed depend on the capabilities of your system's hardware. PhoenixBIOS Setup - Copyright 1992-1998 Phoenix Technologies Ltd.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 14.1.5 Boot Sequence Selecting "Boot Sequence" on the Main Menu displays the Boot Options menu. PhoenixBIOS Setup - Copyright 1992-1999 Phoenix Technologies Ltd.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 14.1.6 Keyboard Features Selecting "Numlock" on the Main Menu displays the Keyboard Features menu: PhoenixBIOS Setup - Copyright 1992-1998 Phoenix Technologies Ltd.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 14.2 Boot Menu After you turn on your computer, it will attempt to load the operating system (such as Windows 98) from the device of your choice. If it cannot find the operating system on that device, it will attempt to load it from one or more other devices in the order specified in the Boot Menu. Boot devices (i.e., with access to an operating system) can include: hard drives, floppy drives, CD ROMs, removable devices (e.g., Iomega Zip drives), and network cards.
DIGITAL-LOGIC AG 14.3 MSLB-P5 Manual V0.3 The Advanced Menu Selecting "Advanced" from menu bar on the Main Menu displays a menu like this: PhoenixBIOS Setup - Copyright 1992-98 Phoenix Technologies Ltd. Main Advanced Security Power Exit ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ ³ Item Specific Help ³ ³ Setting items on this menu to incorrect values ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ may cause your system to malfunction.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 14.3.1 Advanced Chipset Control Menu (PCI BIOS) If the system has a PCI chipset, selecting "Advanced Chipset Control" from the Advanced menu displays a menu like this: PhoenixBIOS Setup - Copyright 1992-1998 Phoenix Technologies Ltd.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 14.3.2 PCI Devices Menu If the system has a PCI bus, selecting "PCI Devices" from menu bar on the Advanced menu displays a menu like this: PhoenixBIOS Setup - Copyright 1992-1998 Phoenix Technologies Ltd.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 14.3.3 I/O Device Configuration Menu Most devices on the computer require the exclusive use of system resources for operation. These system resources can include Input and Output (I/O) port addresses and Interrupt lines for getting the attention of the CPU. Allocating these resources to various devices is called device configuration.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Use the following chart to configure the Input/Output settings: Options Description Serial port A: Serial port B: Feature Disabled Enabled Auto OS Controlled Base I/O Address/IRQ 3F8, IRQ 4 2F8, IRQ 3 Disabled Enabled Auto OS Controlled Disabled turns off the port. Enabled requires you to enter the base Input/Output address and the Interrupt number on the next line. Auto makes the BIOS configure the port automatically during POST.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 The Security Menu Selecting "Security" from the Main Menu displays a menu like this: PhoenixBIOS Setup - Copyright 1992-1998 Phoenix Technologies Ltd.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Note: In some systems, the User and Supervisor passwords are related; you cannot have a User password without first creating a Supervisor password. In other systems, you can create and use them independently. Use the following chart to configure the system-security and anti-virus options.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 The Power Menu Selecting "Power" from the menu bar displays a menu like this: PhoenixBIOS Setup - Copyright 1992-1998 Phoenix Technologies Ltd. Main Advanced Security Power Exit ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ ³ Item Specific Help ³ ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ Power Savings [Customize] ³ Select Power Management ³ ³ ³ Mode.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Feature Power Management Mode Options Disabled Customize Maximum Power Savings Maximum Performance Standby Timeout Off 1 min 2 min 4 min 6 min 8 min 12 min 16 min Auto Suspend Timeout Disabled 5 min 10 min 15 min 20 min 30 min 40 min 60 min Disabled 1 min 2 min 4 min 8 min 12 min 16 min Disabled 10 sec 15 sec 20 sec 30 sec 45 sec 1 min to 15 min Off On Hard Disk Timeout Video Timeout Resume On Modem Ring Resume On Time IRQ0...
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 The Exit Menu Selecting "Exit" from the menu bar displays this menu: PhoenixBIOS Setup - Copyright 1992-1998 Phoenix Technologies Ltd. Main Advanced Security Power Exit ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ ³ Item Specific Help ³ ³ Exit Saving Changes ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ Exit Discarding Changes ³ ³ ³ Load Setup Defaults ³ Exit System Setup and ³ ³ Discard Changes ³ save your changes to ³ ³ Save Changes ³ CMOS.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Load Setup Defaults To display the default values for all the Setup menus, select "Load Setup Defaults" from the Main Menu.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 14.4 PhoenixBIOS Messages The following is a list of the messages that the BIOS can display. Most of them occur during POST. Some of them display information about a hardware device, e.g., the amount of memory installed. Others may indicate a problem with a device, such as the way it has been configured. Following the list are explanations of the messages and remedies for reported problems.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 *Failing Bits: nnnn The hex number nnnn is a map of the bits at the RAM address which failed the memory test. Each 1 (one) in the map indicates a failed bit. See errors 230, 231, or 232 above for offset address of the failure in System, Extended, or Shadow memory. Fixed Disk n Fixed disk n (0-3) identified. Invalid System Configuration Data Problem with NVRAM (CMOS) data. I/O device IRQ conflict I/O device IRQ conflict error.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 14.6.1 Press Pressing Fehler! Verweisquelle konnte nicht gefunden werden. switches to the POST screen and takes one of two actions: 1. If MultiBoot is installed, the boot process continues with the text-based POST screen until the end of POST, and then displays the Boot First Menu, with these options: ? Load the operating system from a boot device of your choice. ? Enter Setup.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 PhoenixBIOS 4.0 Setup - Copyright 1992-1997 Phoenix Technologies Ltd. Main Advanced Boot Exit Item Specific Help 1. 2. 3. 4. 5. [Diskette Drive] [Hard Drive] [ATAPI CD-ROM Drive] [Removable Devices] [Network Boot] To select the boot device use the Up and Down arrows then press <+> to move the device up the list, or <-> to move it down the list.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 NOTE: There is not always an exact correspondence between the order specified in these menus and the letters assigned by the operating system. Many devices such as Legacy Option ROMs support more than one device, which can be assigned more than one letter. PhoenixBIOS 4.0 supports up to six floppy devices, to which the operating system may assign, for example, drive letters A;, B:, E:, F:, G:, and H:.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 15 PHOENIX P HLASH (The current BIOS doesn`t support this function.) Phoenix Phlash gives you the ability to update your BIOS from a floppy disk without having to install a new ROM BIOS chip. Phoenix Phlash is a utility for "flashing" (copying) a BIOS to the Flash ROM installed on your computer from a floppy disk. A Flash ROM is a Read-Only Memory chip that you can write to using a special method called "flashing.
DIGITAL-LOGIC AG 4. MSLB-P5 Manual V0.3 CRISDISK.BAT formats the diskette, then copies MINIDOS.SYS, VGABIOS.EXE (if available), PHLASH.EXE, PLATFORM.BIN and BIOS.ROM to the diskette, and creates the required custom boot sector. Write protect and label the Crisis Recovery Diskette. NOTE: You can only supply a volume label after the Crisis Recovery Diskette has been formatted and the necessary files copied because MINIDOS.SYS must occupy the first directory entry for the diskette to boot properly. 15.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 15.4.1.3 DOS 5.0 (or later version) For DOS 5.0 and later, follow the two steps below to disable any memory managers on your system. If you are not using at least DOS 5.0, then you must create a boot diskette to bypass any memory managers (See Create a Boot Diskette, below). 1. 3. Boot DOS 5.0 or later version. (In Windows 95, at the boot option screen, choose Option 8, "Boot to a previous version of DOS.") When DOS displays the “Starting MS-DOS” message, press .
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16 PROGRAMMER 'S G UIDE This chapter of the User's Manual gives application developers, programmers, and expert computer users a detailed description of the BIOS. This chapter describes the following subjects: + + + + + + What is a ROM BIOS? System Hardware Requirements Fixed-Disk Tables PhoenixBIOS Function Keys POST Errors Run-Time Services What is a ROM BIOS? This section briefly explains the function of a BIOS in managing the special features of your system.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 ROM BIOS Functions The PhoenixBIOS software performs these functions: The Setup Program Initialize Hardware at Boot Run-Time Routines Using the Setup program, you can install, configure, and optimize the hardware devices on your system (clock, memory, disk drives, etc.). At power-on or reset, perform Power-On Self Test (POST) routines to test system resources and run the operating system. Basic hardware routines that can be called from DOS and Windows applications.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 The power on self test (POST) of the BIOS initializes additional ROM BIOS extensions (Option ROMs) if they are accessible in the proper format. The requirements are: Adapter ROM Requirements 1. 2. 3. 4. 5. 6. The code must reside in the address space between C0000H and F0000H. The code must reside on a 2K boundary. The first two bytes of the code must be 55H and AAH. The third byte must contain the number of 512-byte blocks.
DIGITAL-LOGIC AG Type 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 Cylinders 1218 1224 823 809 830 830 1024 1024 615 1024 925 User def. User def. User def. User def. MSLB-P5 Manual V0.3 Heads 15 15 10 6 7 10 5 8 8 8 9 Sectors 36 17 17 17 17 17 17 17 17 26 17 Wrt Pre -1 -1 512 128 -1 -1 -1 -1 128 -1 -1 Landing 1218 1224 823 809 830 830 1024 1024 615 1024 925 16.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.5.3 Test Points and Beep Codes At the beginning of each POST routine, the BIOS outputs the test point error code to I/O address 80h. Use this code during trouble shooting to establish at what point the system failed and what routine was being performed. Some motherboards are equipped with a seven-segment LED display that displays the current value of port 80h.
DIGITAL-LOGIC AG Code 3Ch 3Dh 41h 42h 45h 46h 47h 48h 49h 4Ah 4Bh 4Ch 4Eh 4Fh 50h 51h 52h 54h 55h 58h 59h 5Ah 5Bh 5Ch 60h 62h 64h 66h 67h 68h 69h 6Ah 6Bh 6Ch 6Eh 70h 72h 76h 7Ch 7Dh 7Eh 80h 81h 82h 83h 84h 85h 86h 87h 88h 89h 8Ah 8Bh 8Ch 8Fh 90h 91h PRELIMINARY Beeps 2-1-2-3 2-2-3-1 MSLB-P5 Manual V0.
DIGITAL-LOGIC AG Code 92h 93h 95h 96h 97h 98h 99h 9Ah 9Ch 9Dh 9Eh 9Fh A0h A2h A4h A8h AAh ACh AEh B0h B1h B2h B4h B5h B6h B7h B9h BAh BBh BCh BDh BEh BFh C0h C1h C2h C3h C4h C5h C6h C7h C8h C9h CAh CBh CCh CDh CEh D2h E0h E1h E2h E3h E4h PRELIMINARY Beeps 1-2 1 MSLB-P5 Manual V0.3 POST Routine Description Jump to UserPatch2 Build MPTABLE for multi-processor boards Install CD ROM for boot Clear huge ES segment register Fixup Multi Processor table Search for option ROMs.
DIGITAL-LOGIC AG Code E5h E6h E7h E8h E9h EAh EBh ECh EDh EEh EFh F0h F1h F2h F3h F4h F5h F6h F7h Beeps MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Programs calling the 32-bit BIOS services should scan 0E0000h to 0FFFF0h on the 16-byte boundaries for the contiguous 16-byte data structure beginning with the ASCII signature "_32_". If they do not find this data structure, then the platform does not support the BIOS32 Service Directory. The following chart describes the data structure.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.6.2 Interrupt 10h–Video Services The INT 10h software interrupt handles all video services. The results of some of these functions may depend on the active video mode and the particular video controller installed.
DIGITAL-LOGIC AG continued AH = 0Ah Entry: BH AL CX AH = 0Bh Entry: BH = 00 MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.6.3 Interrupt 11h–Return System Information This service returns the equipment installed as determined by the BIOS on power-up diagnostics and stored in the BIOS Data Area.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 The following table contains the combinations of drive types and media types supported by the INT 13 services 02h to 05h. Media 360 kB 360 kB 1.2 MB 720 kB 720 kB 1.44 MB 720 kB 1.44 MB 2.88 MB Drive Sec/Trk 360 kB 8-9 1.2 MB 8-9 1.2 MB 15 720 kB 9 1.44 MB 9 1.44 MB 18 2.88 MB 9 2.88 MB 18 2.88 MB 36 Diskette Types Tracks 40 40 80 80 80 80 80 90 80 The following describes the diskette services with their entry and exit values.
DIGITAL-LOGIC AG Continued AH = 05h Entry: ES:BX DL DH CH CL AL Exit: AL AH = 08h Entry: DL Exit: ES:DI DH DL CH CL BL AH = 15h Entry: DL Exit: AH AH = 16h Entry: DL Exit: AH AH = 17h Entry: AL DL AH = 18h Entry: CH CL DL Exit: ES:DI AH = 20h Entry: DL Exit: PRELIMINARY MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Continued AL Type of media installed: 00h = 720 kB diskette 01h = 1.44 MB diskette 02h = 2.88 MB diskette 03h = 1 MB diskette 04h = 2 MB diskette 06h = 4 MB diskette 16.6.
DIGITAL-LOGIC AG Continued AH = 02h Entry: ES:BX DL DH CH CL AL Exit: AL AH = 03h Entry: ES:BX DL DH CH CL AL Exit: AL AH = 04h Entry: ES:BX DL DH CH CL AL Exit: AL AH = 05h Entry: ES:BX DL DH CH CL AL Exit: AL AH = 08h Entry: DL Exit: CL CH DH DL AH AL CX DX PRELIMINARY MSLB-P5 Manual V0.
DIGITAL-LOGIC AG Continued AH = 09h Entry: DL AH = 0Ah Entry: ES:BX DL DH CH CL AL Exit: AL AH = 0Bh Entry: ES:BX DL DH CH CL AL Exit: AL AH = 0Ch Entry: ES:BX DL DH CH CL AH = 0Dh Entry: DL AH = 10h Entry: DL AH = 11h Entry: DL AH = 14h Entry: DL AH = 15h Entry: DL Exit: AH CX DX PRELIMINARY MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.6.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG Continued Offset 3h Byte 4h-7h 8h-9h Ah-Bh Ch-Dh Eh-Fh 10h Byte 11h Byte 12h Byte MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.6.9 Interrupt 14h–Serial Services The INT 14 software interrupt handles serial I/O service requests. Use the AH register to specify the service to invoke. This describes the UART Modem and Line Status returned by these services. It also includes two services, 04h and 05h, that support the extended communication capabilities of PS/2. The following describes the modem status returned by serial services.
DIGITAL-LOGIC AG Continued AH = 01h Entry: AL DX Exit: AH AH = 02h Entry: DX Exit: AL AH AH = 03h Entry: DX Exit: AH AL AH = 04h Entry: DX AL BH BL CH CL MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.6.
DIGITAL-LOGIC AG Continued AH = 85h Entry: AL AL AH = 86h Entry: CX DX AH = 87h Entry: CX ES:SI AH = 88h Exit: AX AX AH = 89h Entry: ES:SI BH BL AH = 90h Entry: AL ES:BX Exit: Carry AH = 91h Entry: AL Continued PRELIMINARY MSLB-P5 Manual V0.
DIGITAL-LOGIC AG Continued AH = C0h Exit: ES:BX in bytes (8) MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 following are the Interrupt 15 APM Services of PhoenixBIOS 4.0: Interrupt 15h APM Services AH = 53h APM 1.0 and APM 1.1 BIOS Services AL = 00h Installation Check Entry: BX 0000h = Power Device ID (APM BIOS) All other values reserved Exit: AH APM major revision in BCD AL APM minor revision in BCD BH ASCII "P" BL ASCII "M" CX APM information: Bit 01 = 16 bit Prot Mode supported Bit 11 = 32 Bit Prot Mode supported Bit 21 = CPU IDLE slows down CPU speed.
DIGITAL-LOGIC AG Continued AL = 07h Entry: BX MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Continued AL = 0Bh Get PM Event Exit: BX PM event code AL = 0Ch Get Power State Entry: BX Power Device ID: 0001h = All PM devices managed by the BIOS 01XXh = Display 02XXh = Secondary Storage 03XXh = Parallel Ports 04XXh = Serial Ports 05XXh = Network Adapters 06XXh = PCMCIA Sockets E000h-EFFFh = OEM-defined power-device IDs All other values reserved where: XXh = Unit Number (0 based) AH = 53h APM 1.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.6.12 Interrupt 15h–Big Memory Services The INT 15 software interrupt optionally handles the calls reporting extended memory over 64 MB. The first function, 8Ah, only supports certain versions of UNIX. The second function, E8h, incorporates these sub functions: • • Big memory for Windows NT 3.01 and OS/2 2.11 and 2.20–E801h (16 bit) and E881h (32 bit).
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.6.13 Interrupt 15h–PS/2 Mouse Services The INT 15 software interrupt optionally supports systems with the PS/2 mouse or similar devices installed on the motherboard. The following table describes the exit status codes: AH PS/2 Mouse Exit Status Codes 00h = No error 01h = Invalid function call 02h = Invalid input value 03h = Interface error 04h = Request for resend received from 8042 05h = No driver installed (i.e.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 The following are the Interrupt 15 EISA services of PhoenixBIOS 4.
DIGITAL-LOGIC AG Continued AL Entry: CL Exit: DI SI MSLB-P5 Manual V0.3 04h = Read board ID registers 84h = Read board ID registers, 32 bit Slot number (0-63) First word of compressed ID: Byte 0: Bits 1-0 2nd character of manufacturer code Bits 6-2 1st character of manufacturer code Bit 7 Reserved Byte 1: Bits 4-0 3rd character of manufacturer code Bits 5-7 2nd character of manufacture code, cont.
DIGITAL-LOGIC AG Continued AH = 11h Exit: AL AH ZF NZ AH = 12h Exit: AL AH MSLB-P5 Manual V0.3 Return extended buffer status. ASCII keystroke pressed Scan code of key No keystroke available Keystroke in buffer Return extended shift status.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.6.17 Interrupt 17h–EPP Services Use Interrupt 17h 02h to obtain the BIOS entry point (also called the EPP Vector) to Enhanced Parallel Printer (EPP) Services. To use the other EPP services, load AH with an appropriate function value and Far call the EPP Vector.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.6.18 Interrupt 1Ah–Time of Day Services The INT 1Ah software interrupt handles the time of day I/O services. A Carry flag set on exit may indicate the clock is not operating.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.6.19 Interrupt 1Ah–General PCI Services PhoenixBIOS 4.0 optionally supports General PCI Interrupt 1Ah Services.
DIGITAL-LOGIC AG Continued AL Entry: BH BL DI Exit: CX AL Entry: BH BL DI Exit: ECX AL Entry: BH BL DI CL AL Entry: BH BL DI CX AL Entry: BH BL DI ECX AL Entry: DS ES DI EDI Exit: BX AL Entry: BH BL CL CH DS PRELIMINARY MSLB-P5 Manual V0.3 09h = Read configuration word Bus number (0-255) Bits 7-3 Device number Bits 2-0 Function number Register number (0, 2, 4,...254) Word read 0Ah = Read configuration dword Bus number (0-255) Bits 7-3 Device number Bits 2-0 Function number Register number (0, 4, 8,...
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.6.20 PnP Run-Time Services Plug and Play automatically configures PC hardware and attached devices without requiring you to manually configure the device with jumpers or in Setup. You can install a new device such as sound or fax card ("plug it in") and start working ("begin playing").
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 To find the PnP entry points, search for the PnP BIOS Support Installation Check structure by searching for the "$PnP" signature in system memory staring from F0000h to FFFFFh at every 16-byte boundary. Check the validity of the structure by adding the values of Length bytes, including the Checksum field, into a 8-bit value. Zero indicates a valid checksum.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Continued 42h Read Extended System Configuration Data Entry: int FAR (*entryPoint)(Function, ESCDBuffer, ESCDSelector, BiosSelector); int Function; char FAR *ESCDBuffer; unsigned int ESCDSelector; unsigned int BiosSelector; 43h Write Extended System Configuration Data (ESCD) Entry: int FAR (*entryPoint)(Function, ESCDBuffer, ESCDSelector, BiosSelector); int Function; char FAR *ESCDBuffer; unsigned int ESCDSelector; unsigned int BiosSelector; 16.6.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 The following are the exit status codes for the SMBIOS Services: SMBIOS Services Exit Status Codes AX AX 00h = Function Completed Successfully 81h = Unknown, or invalid, function number passed 82h = The function is not supported on this system 83h = SMBIOS Structure number/handle passed is invalid or out of range.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 Continued BIOS Data Area, Continued 8 Not used 9-11 Number of serial adapters 12 Game Adapter installed 13 Not used 14,15 Number of parallel adapters Offset Size Description 12 1 Interrupt flag (POST) 13 2 Memory size (K bytes) 15 1 Reserved 16 1 Control flag Keyboard Data Area Offset Size Description 17 1 Keyboard flag 0: Bit .... Definition 0....... Right shift key pressed 1....... Left shift key pressed 2....... Control key pressed 3....... Alt key pressed 4.......
DIGITAL-LOGIC AG MSLB-P5 Manual V0.
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 16.7.1 Extended BIOS Data Area The Extended BIOS Data Area (EBDA), located in the top 1k of system RAM, contains information about the pointing device (PS/2 mouse). INT 15h AH = C1h returns the segment starting address of this table. Offset 00h 01h 21h 25h Size 1 33 4 1 26h 1 27h 2 Extended BIOS Data Area Description Size of EBDA in kbytes Reserved Pointer to device routine First byte of pointer information: Bit .... Definition 4....... Pointer error 5.......
DIGITAL-LOGIC AG 17 MSLB-P5 Manual V0.3 INDEX 2 Block Diagram................................................................10 Boot First Menu....................................................151, 153 boot options..................................................................135 bootable CD ROM ........................................................175 build a system...............................................................127 Burst ..........................................................
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 sectors ......................................................................169 services .....................................................................168 status ........................................................................169 type...................................................................169, 170 diskette and fixed-disk systems....................................171 DMA .......................................................................
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 interfaces.......................................................................12 interrupt non-maskable............................................................207 table.........................................................................164 vector........................................................................207 Interrupt Controllers.......................................................43 IRQ.........................................................
DIGITAL-LOGIC AG MSLB-P5 Manual V0.3 option ROM .............................................................158 system board ............................................................158 Reset diskette system ...................................................169 ROM BIOS........................................................................157 default values............................................................147 ROM-BIOS....................................................................