Instruction manual

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Page 71

Offset

Write and/or

Read

Width

Title

Mnemonic

Write and Read 8 bits

82C54 Counter/Timer

Counter 0 Data Register

CT0

FUNCTION

The Counter 0 Data Register is used to write and read 8 bit data to the 82C54 counter/timer 0. The

counter is normally configured for 16 bit operation and to ensure validity of the data it is important

to always write/read two bytes to the register, least significant byte first. Please note that the 16-bit

count values written to this register are not latched into the counting element until the next clock

pulse (assuming the gate input is high). Subsequent read operations from this register will

therefore not reflect the new count value until this clock pulse has latched the data.

This register is also used to read counter 0 status if the status has been latched using the Read-

Back command (not supported on 82C53).

The counter can be configured to operate in several modes. Further details may be found by

reference to the device manufacturer's 82C54 (or 82C53) data sheets.

BIT ASSIGNMENTS

The bit layout of the counter 0 register is shown below.

7 6 5 4 3 2 1 0

First Byte

(Least Significant)

Second Byte

(Most Significant)

16 BIT COUNTER 0 DATA BIT

5.4.2.2 82C54 Counter 1 Data Register

The 82C54 Programmable Timer Counter provides three 16 bit counter/timers which can be

independently programmed to operate in any one of six modes with BCD or Binary count functions.

The register definition for Counter 1 Data is as follows.