Instruction manual

AMPDIO DRIVERS
Page 191
by 4 (0, 4, 8, 12, 16, 20). For timer/counter
interrupt or first interrupt line on a PPI chip it is
the address offset of the chip. For second
interrupt line on a PPI chip it is the address
offset of the PPI chip plus 4. Corresponds to bit
positions in interrupt enable register if the card
has one, otherwise use the address offset of
the interrupting chip. The following pre-defined
constants may be used:
X1 = 0 PPIXC0 = 0
X2 = 4 PPIXC3 = 4
Y1 = 8 PPIYC0 = 8
Y2 = 12 PPIYC3 = 12
Z1 = 16 PPIZC0 = 16
Z2 = 20 PPIZC3 = 20
PPIX = 0 PPIYC7 = 8
PPIY = 8 EXT0 = 0
PPIZ = 16 ADC0 = 0
ADC2 = 8
DAC2 = 8
DAC4 = 16
SATRIG = 12
SizeReq unsigned long: number of data values in each
buffer.
fContin short: use single buffer if zero, use double
buffering (continuous mode) if non-zero.
ISRDATA short: type of data transfer to be performed on
interrupt. The following pre-defined constants
may be used:
ISR_WRITE_2DACS = 36
Block1 unsigned long: usage depends on ISRDATA
value.
For ISR_WRITE_2DACS: the channel group
number of the first DAC to write to.
Port1 unsigned long: usage depends on ISRDATA
value.
For ISR_WRITE_2DACS: the channel number
(within the group) of the first DAC to write to.
Block2 unsigned long: usage depends on ISRDATA
value.
For ISR_WRITE_2DACS: the channel group
number of the second DAC to write to.
Port2 unsigned long: usage depends on ISRDATA
value.
For ISR_WRITE_2DACS: the channel number
(within the group) of the second DAC to write