Instruction manual

Table Of Contents
PC215E Page 48
BIT ASSIGNMENTS
Bit layout of the counter/timer status word register is shown below.
Bits 5…0 Counter's programmed Mode exactly as written in the last Mode Control Word
Bit 6 State of the addressed counter element
0 Count available for reading
1 Null Count
Bit 7 State of the addressed counter OUT pin
0 OUT pin is '0'
1 OUT pin is '1'
01234567
Counter Latch Command
Bits 3 to 0 = Don’t care
Bits 5 and 4 = 0
Designates Counter Latch Command
Bits 7 and 6
00 = Counter 0
01 = Counter 1
10 = Counter 2
11 = Read-back Command
01234567
Read-back Command
Bit 0 = 0
Bit 1 = Select Counter 0
Bit 2 = Select Counter 1
Bit 3 = Select Counter 2
Bit 4 = /Latch Status of Selected Counter(s)
Bit 5 = /Latch Count of Selected Counter(s)
Bits 6 and 7 = 1
Designates Read-back Command
01234567
Counter Programmed
Mode
OUT Pin Status
Null Count