Instruction manual

Table Of Contents
Page
23
PC215E
5. STRUCTURE AND ASSIGNMENTS OF THE REGISTERS
The set of demonstration programs and routines provided with the PC215E allows the user access to
all the operational functions of the board. However, in some circumstances, the user may wish to
program the application at the lowest level using input/output instructions. This section provides the
necessary information on the accessible registers.
5.1 Register Assignments
The PC215E registers occupy 32 consecutive address locations in the I/O space. A table
summarising the register assignments is shown in Figure 8. Please note that the actual
register address is the base address configured on the board plus the register offset given
in the table. See section 2.6.1 for information on setting the base address.
5.2 Register Groups
All five boards in the PC214E, PC215E, PC212E, PC218E and PC272E series have the same
register map, which is split up into five groups
5.2.1 Cluster X, Y and Z Groups
Each of the Cluster X, Y and Z groups is populated with either an 82C55 Programmable
Peripheral Interface (PPI) device to provide digital input/output, or two 82C54 Counter/Timer
devices, and each of the boards in the range deploy various combinations of these devices.
The PC215E board has only two PPI groups (X and Y) and one Counter/Timer group (Z).
5.2.2 Counter Connection Register Group
The Counter Connection Register group provides software-programmable clock and gate
connections for the six Counter/Timers.
5.2.3 Interrupts Group
The Interrupt group provides software-programmable interrupt source selection and interrupt
source status information.
The consistency of register definitions across the range does mean that some boards, like the
PC215E, have unused address spaces. It is advised that such addresses are treated as
reserved, and not used for other purposes. A summary of PC215E register definitions is given
in Figure 8 - PC215E Register Assignments.