Instruction manual
Table Of Contents
- INTRODUCTION
- GETTING STARTED
- MAKING THE CONNECTIONS
- USING THE PC215E
- STRUCTURE AND ASSIGNMENTS OF THE REGISTERS
- Register Assignments
- Register Groups
- The Register Details
- Programmable Peripheral Interface PPI-X Data Register Port A
- Programmable Peripheral Interface PPI-X Data Register Port B
- Programmable Peripheral Interface PPI-X Data Register Port C
- Programmable Peripheral Interface PPI-X Command Register
- Programmable Peripheral Interface PPI-Y Data Register Port A
- Programmable Peripheral Interface PPI-Y Data Register Port B
- Programmable Peripheral Interface PPI-Y Data Register Port C
- Programmable Peripheral Interface PPI-Y Command Register
- Z1 Counter 0 Data Register
- Z1 Counter 1 Data Register
- Z1 Counter 2 Data Register
- Counter/Timer Z1 Control Register
- Z1 Counter/Timer Status Register
- Z2 Counter 0 Data Register
- Z2 Counter 1 Data Register
- Z2 Counter 2 Data Register
- Counter/Timer Z2 Control Register
- Z2 Counter/Timer Status Register
- Group Z Clock Connection Register
- Group Z Gate Connection Register
- Interrupt Source Selection Register
- Interrupt Status Register
- PROGRAMMING THE PC215E
- Copyright
- Files installed from the Distribution Diskette
- Windows DLL and Examples
- DOS 'C' Library and Examples
- Using the Dynamic Link Library
- Windows and DOS Library Functions
- Initialisation Functions
- Interrupt Control Functions
- Data Buffer Functions
- Timer/Counter Functions
- Differential Counter Functions
- Frequency Generation Functions
- Millisecond Stopwatch Functions
- Frequency Input and Output Functions
- Digitally- and Voltage-Controlled Oscillator Functions
- Digital Input/Output Functions
- Switch Scanner Matrix Functions
- Bi-Directional Data Bus Functions
- PC215E Library Error Codes
- PC215E Interface Guide For LABTECH NOTEBOOK
- Guide to User Programming
- Signal Centre
- CONTENTS
- DECLARATION OF CONFORMITY
PC215E Page 14
3.3 Use of Shielded Cables
In order to maintain compliance with the EMC directive, 89/336/EEC, it is mandatory that the
final system integrator uses good quality screened cables for external connections. It is up to
the final system integrator to ensure that compliance with the Directive is maintained. Amplicon
Liveline offers a series of good quality screened cables for this purpose. Please contact our
sales staff.
3.4 Digital Input/Output Conditions
Specifications of the digital input/output lines on PPI X and PPI Y Ports A, B and C are:-
Inputs -
'Low' input voltage –0.5 V to +0.8 V
'High' input voltage +2.2 V to +5.3 V
When an input line is left open circuit, the state is indeterminate. Ensure that signals to any
inputs are within the above limits, and that any unused input lines are grounded or masked out
in software. The output currents shown below must not be exceeded.
Outputs -
'Low' output voltage +0.4v max at +2.5 mA
'High' output voltage +3.5v min at –400µA
3.5 Counter/Timer Input/Output Conditions
Specifications of the counter/timer input/output lines of Z1 and Z2 Counter 0, Counter 1 and
Counter 2 are:-
Clock and Gate Inputs -
'Low' input voltage 0 V to 0.5 V
'High' input voltage +2.1 V to +10 V
See sections 5.3.19 and 5.3.20 for more details on the clock and gate input selection. The
output currents shown below must not be exceeded.
Outputs - 'Low' output voltage +0.3 V max at +5.0 mA
'High' output voltage +3.8 V min at –5.0 mA
3.6 PC Back-plane Bus Connections
Connections between the host PC/AT and the PC215E are through a 62 way and a 36 way
edge connector on the PC/AT ISA bus. The user will not normally require access to this I/O
connector information, but for troubleshooting and diagnostic purposes, Figure 6 lists these
standard back-plane connections. The PC215E does not use all of the signals. *Note: Pin B4
is IRQ9 which is re-directed as IRQ2. (Via the computer's second Programmable Interrupt
Controller)