Instruction manual

PC24E/25E
Page 11
Nº OF WAIT
STATES
0
1
2
3
EXPANSION
BUS SPEED
Up to 8 MHz
8 to 10 MHz
10 to 12 MHz
12 MHz and above
J15 JUMPER
SETTING
No jumper
3
4
5
Figure 5 J15 Wait State Settings
2.5.4 DAC Loading Mode
Each Digital to Analog Converter (DAC) has twelve bits resolution and the data word is right
justified and loaded sequentially in two bytes, the least significant byte (LSB) of eight bits and
the most significant byte (MSB) of four active bits. Jumper facilities are provided so that the
data word can be loaded either MSB last or LSB last. The correct setting of the jumpers
relative to the user's program will ensure that the DAC analog output is updated when both
bytes have been loaded.
Jumpers J6, J7, J8 and J9 select the loading mode for each of the DACs. Note J6 is
associated with DAC4, J7 with DAC3, etc.
Jumper
Number
J6
J7
J8
J9
DAC
Number
4
3
2
1
Loading Sequence
LSB Last MSB Last
LSB MSB
LSB MSB
Figure 6 DAC LOADING MODES
The loading mode of each channel can be separately selected as indicated in the table shown
in figure 6. Mixed loading modes can be supported on a single board. Factory default setting is
all DACs loaded LSB first with the analog output updated on loading of the MSB.
2.5.5 Voltage Output Ranges (PC24E Only)
The voltage output range of the four DACs on the PC24E can be set by jumpers according to
the table in figure 7. The four DAC channels can be independently selected for unipolar or
bipolar operation, but the maximum output voltage set by jumper J3 applies to all four
channels simultaneously.