Specifications

INTEL OEM PRODUCTS AND SERVICES DIVISION PRELIMINARY - REV 0.1
Classic/PCI i486 Baby-AT Motherboard Technical Product Summary
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• Burst memory read/write control logic
• Data bus conversion to PCI
• Parity generation/detection to memory
• AT-BUS direction control
• Chip select for keyboard controller and RTC
• Speaker control
• NMI logic
• Floating-point coprocessor interface
• Keyboard reset and gate A20 emulation logic
• DMA controller
• Interrupt controller
• Counters/Timers
82424TX CACHE/DRAM/CONTROLLER (CDC)
The 82424TX provides all control signals necessary to drive the DRAM array, including multiplexed address signals.
It also controls system access to memory and generates snoop controls to maintain cache coherency.
82423TX DATA PATH UNIT (DPU)
The 82423TX provides data bus buffering and dual port buffering to the memory array. Controlled by the 82424TX,
the 82423TX device adds one load to the PCI bus and performs all the necessary byte and word swapping required.
Memory and I/O write buffers are included in these devices.
82378IB SYSTEM I/O (SIO)
The 82378IB integrates seven 32-bit DMA channels, five 16-bit timer/counters, two eight-channel interrupt
controllers, NMI logic, refresh address generation, and PCI/ISA bus arbitration circuitry together onto the same
device.
EXPANSION SLOTS
The Classic/PCI i486 Baby-AT Motherboard contains support for up to seven populated expansion slots, offering ISA
and PCI connectors. These connectors include four ISA bus expansion slots, and two PCI expansion slots; the seventh
slot uses both an ISA connector and a PCI connector side by side, and can accept either an ISA or PCI adapter board
but not both together. The expansion cards are oriented perpendicular to the motherboard. All three PCI expansion
slots accept PCI master cards, fully supporting the PCI specification.
SMC 37C663 SUPER I/O CONTROLLER
Control for the integrated serial ports, parallel port, floppy drive and IDE hard drive interface is incorporated into a
single component, the SMC FDC37C663. This component provides:
• Two NS16C552 compatible UARTs (with FIFO support)
• IBM and Centronics compatible bi-directional parallel port controller
• Industry standard floppy controller (with 2.88 MB floppy support)
• IDE hard disk decode and chip select
Header connectors are available near the back of the board for cabling these options. The serial ports can be enabled as
COM1 and COM2 or disabled. The parallel port can be enabled via the SETUP program as LPT1 or disabled, and can
be set as bi-directional or output only when enabled.
DALLAS DS12887 REAL TIME CLOCK, CMOS RAM AND BATTERY
The Real Time Clock (RTC) is implemented using a Dallas DS12887 device. The DS12887 is accurate to within 13
minutes/year and requires no external support (the battery and oscillator are integrated into the device). The
component is soldered into the board (the internal battery has an estimated lifetime of ten years).
The RTC can be set via the BIOS SETUP Program. CMOS memory supports the standard 128-byte battery-backed
RAM, fourteen bytes for clock and control registers, and 114 bytes of general purpose non-volatile CMOS RAM. All
CMOS RAM is reserved for BIOS use. The CMOS RAM can be set to specific values or cleared to the system default
values using the BIOS SETUP program. Also, the CMOS RAM values can be cleared to the system defaults by using a
hardware jumper. The appendices contain a list of jumper configurations.