Specifications

INTEL OEM PRODUCTS AND SERVICES DIVISION PRELIMINARY - REV 0.1
Classic/PCI i486 Baby-AT Motherboard Technical Product Summary
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Board Level Features
CPU
The Classic/PCI i486 Baby-AT motherboard has a wide price/performance range to meet a variety of customer needs.
Four base CPU options are available:
an i486 SX running at 33 MHz;
an i486 DX at 33 MHz;
an i486 DX2 at 66 MHz; or
a next generation i486 processor operating at 3.3V internally, and 33 MHz bus speed
The Classic/PCI i486 Baby-AT motherboard supports all of the functionality of the i486. Common features of the CPU
include backward compatibility with the 8086, 80286, and i386 CPUs, burst mode bus cycles, and an on-chip 8 KB
cache. The cache is 4-way set associative, uses a write-through policy, and can be disabled via software.
The i486 DX CPU contains an on-chip numeric coprocessor to increase the speed of floating point operations. This
coprocessor is backward code-compatible with i387 DX and i387 SX math coprocessors and complies with
ANSI/IEEE standard 754-1985. The i486 SX does not include the numeric coprocessor. The i486 DX2 incorporates
clock-doubling technology developed by Intel to offer the highest CPU performance available today.
PERFORMANCE UPGRADE
The Classic/PCI i486 Baby-AT motherboard incorporates a single 238-pin processor socket allowing easy upgrades to
CPU performance. All Classic/PCI i486 Baby-AT motherboards can be upgraded with an OverDrive Processor
including future OverDrive Processors based on the Pentium CPU architecture. These upgrades will provide
significantly higher CPU performance and numeric capability. In addition, systems with a i486 SX/33 CPU can
improve floating point performance by installing an i487 SX/33 in place of the CPU. When replacing an i486 SX/33
CPU with an OverDrive Processor no jumper change are required; just power up and go!
SECOND LEVEL CACHE
In addition to the i486 CPU's internal cache, the Classic/PCI i486 Baby-AT motherboard was designed with a second
level cache using industry-standard SRAM. The 82424TX CDC includes a direct-mapped, write-back cache controller.
The motherboard includes four 32K x 8 20ns cache SRAM devices for a total of 128 KB cache memory.
SYSTEM BIOS
The Classic/PCI i486 Baby-AT Motherboard uses American Megatrends Incorporated (AMI) i486 CPU ROM BIOS,
which provides ISA compatibility. The system BIOS is stored in FLASH EEPROM, providing easy upgradability of
program code space from a floppy disk or a file downloaded from a BBS; BIOS upgrades will be available for download
from iPAN, the electronic bulletin board service of IntelTechDirect. In addition to the AMI BIOS, the FLASH
memory also contains the PCI Auto-configuration utility, SETUP utility, Power-On Self-Tests (POST), and update
recovery code. For improved system performance, the Classic/PCI i486 Baby-AT Motherboard supports system BIOS
shadowing, allowing the BIOS to execute from 32-bit on-board write-protected DRAM instead of the slower 8-bit
FLASH devices. The Classic/PCI i486 Baby-AT BIOS sign-on during POST is along the bottom of the screen, and
contains information which identifies revision and type of BIOS. On the lower left is a four digit code which denotes
revision; first production units will display 0101, and as updates occur will roll the "minor revision number", i.e. 0102.
BIOS level and board identifier code is contained on the lower right side, and will be P00.AQ0 for the Classic/PCI i486
Baby-AT motherboard. As a note, A01 denotes Alpha revision 01, and B01 denotes Beta revision 01.
Further information on BIOS functions can be found in the IBM PS/2 and Personal Computer BIOS Technical
Reference published by IBM, and the ISA and EISA Hi-Flex AMIBIOS Technical Reference published by AMI and
available at most technical bookstores.
PCI AUTO-CONFIGURATION CAPABILITY
The PCI Auto-configuration feature provides a new level of user satisfaction. Simply plug a PCI add-in card into an
empty connector and turn the system on. The BIOS automatically configures interrupts, DMA channels, I/O space,
etc. This eliminates the requirement for adapter card jumper changes due to resource conflicts, and provides
unrivaled ease of use in a PC.