System information

4.2 Graphic Card Implementation Layout
031
0x0
0x10
0x20
0x30
Request Buffer
PCI Request 2
PCI Request 1
PCI Request 2
PCI Request 3
PCI Request N
31
0x20
0x30
0
PCI ADDRESS
PCI DATA
GAP
BAR NR., CMD,
BYTEENABLE.
PCI BYTEENABLEPCI COMMANDPCI BAR Nr
0347811
Figure 4.8: Structure of the Request Buffer
An entry of the Request Buffer must contain all information about the PCI cycle. The
necessary information is: PCI address, PCI command, PCI byteenable and the PCI data.
The PCI information are saved in a structured way. Figure 4.8 illustrates the structure of
a Request Buffer entry. The PCI command is saved to associate the PCI address to one of
the two address spaces: I/O or memory. Sometimes not all bytes of the received PCI data
carry meaningful data. The PCI byteenable validates the bytes of the sent data. For this
reason the PCI byteenable must also be saved to separate the valid bytes inside a PCI data
packet. PCI devices have up to six BARs. Figure 4.5 depicts the PCI Configuration Header
containing the six Base Address Registers. The PCI BAR number stored in the Request
Buffer represents one of this BARs. The CHARM has additional PCI target functions
beyond the VGA standard. Every BAR is assigned to a dedicated function. An overview
of the PCI related functions is given in chapter 2. To assign the PCI requests to a function,
the BAR number is saved, too. By the reason of saving FPGA resources and to simplify
the Request Buffer management, there is a gap at the end of a buffer entry. The entries
are aligned to a 16 byte boundary. Due to performance-enhancing, the buffer is not cleared
after processing. The PCI target control unit marks the end of the buffer with a dedicated
value. The software processes the buffer until reading out the mark. Figure 4.9 shows a
Request Buffer at two different points in time.
The left side of the picture shows the first content of the Request Buffer. After the
data processing, the PCI target control unit writes to the Request Buffer again. The right
buffer contains the latest data content. The old data content was overwritten and the end
mark assigns the end of the valid content. The entries after the mark are old data from
the last buffer content. The Request Buffer on the right side also contains a PCI read
request. A read request has to be processed immediately and the PCI target control unit
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