System information

2 CHARM Architecture
(SOPC). Furthermore, the Avalon Bus architecture consists of logic and routing resources
inside a PLD. The principal design goals of the Avalon Bus are: simplicity, optimized
resource utilization and synchronous operation.
AHB Bus System The Advanced High-Performance Bus (AHB) is a high-performance
bus developed for AMBA. A typical AMBA-based system contains a microcontroller, high-
bandwidth on-chip RAM and a bridge interfacing low-bandwidth devices. The AHB Spec-
ification is part of the AMBA-Specification. It was developed from the Advanced RISC
Machines Ltd. (ARM). To archive best performance, AHB supports burst transactions and
pipelined operations.
HPI Bridge The HPI
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-Bridge is the interface between the AHB bus and the USB chip.
Generally, the Host Port Interface provides DMA access to the USB chip’s internal memory
by an external host [42].
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Host Port Interface, an interface of the Cypress USB chip.
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