System information

2 CHARM Architecture
PLD
AHB-Avalon
Bridge
Tristate
Bridge
ADC SRAM
Stripe
PLD
Bridge
PLD
Stripe
Bridge
PCI
Master
PCI
Core
PCI
Bus
USB
Chip
Stripe
LEDs, Optocoupler,
Power Source
POST
Sniffer
PCI
Bus
Avalon Bus
AHB Bus
AHB Bus
PCI
BARHide
FAN
Speed
CHARM
Register
AHB
HPI
Bridge
FAN
Connectors
AHB
Master
PCI
Target
SPI
Figure 2.3: Structure of the CHARM PLD design.
Altera PCI Core The Altera PCI MegaCore is a soft IP
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core sold by the Altera Corpo-
ration. It provides an interface to the Conventional PCI bus. This includes the handle of
the PCI protocol and of the timing requirements. The front-end side of the core is directly
connected to the PCI bus signals. The back-end interface provides a PCI target port and
a PCI master port to connect user logic entities [39]. The core is available in four config-
urations: Master/Target 64bit, Target 64bit, Master/Target 32bit and Target 32bit. The
CHARM integrates the Master/Target 32bit core.
PCI BAR Functions The PCI core provides up to six PCI Base Address Registers (BAR)
[39]. The BAR defines address windows inside the host computer system [40]. The CHARM
uses four BARs for its PCI functions. Every address region is used by a dedicated CHARM
function. The main function is the VGA functionality. Table 2.2 depicts this relationship.
The first BAR is used for the graphic card implementation of the CHARM besides the
VGA protocol. The second BAR marks an I/O address window which provides a communi-
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Intellectual Property.
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