System information

D CHARM Register Map
#ifndef __CIA_PORT_MAP__
#define __CIA_PORT_MAP__
// AUTO-CREATED: Mi 11. Jun 15:58:51 CEST 2008
// based on cia_controller.vhd SVN Revision: unknow
// These are the offsets of the CHARM control register.
// All offsets are double word addresses.
#define POST_CODE_ADDR (0x00/4)
#define POST_CODE_DATA (0x04/4)
#define PC_STATE_ACK (0x08/4)
#define AHB_BRIDGE_STATE (0x0c/4)
#define PCI_MASTER_DATA_OUT (0x10/4)
#define PCI_MASTER_DATA_IN (0x14/4)
#define PCI_MASTER_CONTROL (0x18/4)
#define PCI_MASTER_ADDRESS (0x1c/4)
#define PCI_MASTER_RESET (0x20/4)
#define PCI_MASTER_COMMAND (0x24/4)
#define VGA_INTERRUPT (0x28/4)
#define SNIFFER_REQUEST (0x2c/4)
#define CIA_CONTROLLER_VERSION (0x30/4)
#define USB_RESET (0x34/4)
#define ADC_INTERRUPT (0x38/4)
#define POWER_SOURCE (0x3C/4)
#define OPTOCOUPLER_1 (0x40/4)
#define OPTOCOUPLER_3 (0x44/4)
#define OPTOCOUPLER_5 (0x48/4)
#define OPTOCOUPLER_7 (0x4c/4)
#define CIA_CONTROLLER_DATE (0x50/4)
#define PCI_BUS_NRESET (0x58/4)
#define PCI_CORE_STATUS (0x60/4)
#define CHARM_IRQ (0x64/4)
#define FAN4_SPEED (0x70/4)
#define FAN5_SPEED (0x74/4)
#define FAN6_SPEED (0x78/4)
#define FAN7_SPEED (0x7c/4)
#define FAN8_SPEED (0x80/4)
#define RESET_SW_INPUT (0x90/4)
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