System information

8.2 Network Card
unit with the aid of the Stripe-PLD bridge. The middle box of the picture represents the
interface between the local I/O system and the physical layer which is the PCI bus in our
case. The SRAM is shared between the CHARM card and the host computer.
PLD
AHB
Avalon
Bridge
Tristate
Bridge
Onboard SRAM
Stripe
PLD
Bridge
PCI
Target
PCI
Core
Avalon
Master
PCI
Bus
Stripe
Avalon Bus
AHB Bus
AHB Bus
CPU
IRQ
Controller
Memory
CHARM Host
IRQ
Controller
ARM
CPU
CHARM
Register
Figure 8.6: Block diagram of the network function of the CHARM.
A PCI BAR of the CHARM card maps the SRAM to the PCI bus system of the host
computer. The network data traffic flows through the shared SRAM memory which is
central unit of the CHARM-Host network bridge. The right part of the picture depicts
the PCI bus, the physical layer of the CHARM network function. The network interface
of the host side is quite similar. The PCI bus is part of the host computer and obviously
is accessible by the host system. The network packets from the host computer are copied
from the main memory of the host to the SRAM of the CHARM card. The IRQ-Controller
of the CHARM card and the host computer are used to inform the counterpart about the
existence of new data packets. Figure 8.7 shows the layout of the SRAM. The first entry
in the SRAM stores the status of the network connection. The next two double words
contain the jiffies
1
of the system. Afterwards, two FIFOs are implemented in the SRAM.
The FIFOs are organized as circular buffers and store the received or sent network data.
Thereby, the RX buffer of one system is the TX buffer of the counterpart at the same time.
Transfer FIFOs
As mentioned above, the transfer FIFOs are circular buffers. The middle part of the picture
8.7 shows the layout of a transfer FIFO. The write pointer of the FIFO (marked as "in"
in figure 8.7) is stored at the beginning of the buffer. The read pointer is stored next to
the write pointer (marked as "out" in the figure 8.7). The read pointer is written by the
receiving system and the write pointer is only changed by the sending counterpart. This
1
The number of elapsed ticks since the system was started [49].
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