Specification Sheet

PID: 43375 Rev 3.46 - September 2010 AMD Family 10h Desktop Processor
Power and Thermal Data Sheet
94Power Supply Specifications
Table 32. bsmmmmrr K ncdd AC and DC Operating Conditions for non-VDD Power Supplies
Symbol Parameter Units Min Typ Max Notes
VDDIO_ d c
VDDIO Su p p ly Vo lt a g e fo r
DDR3 electricals
V 1.375 1.500 1.625 1
VDDIO_ a c VDDIO Su p p ly v o lt a g e V
VDDIO_dc –
125 mV
VDDIO_ d c
VDDIO_ d c +
125 mV
2, 3
VLDT VLDT Supply Voltage V 1.14 1.20 1.26 12
VDDR_ d c
VDDR Su p p ly Vo lt ag e fo r
DDR3 electricals
V 1.14 1.20 1.26 4
VDDR_ ac VDDR Su p p ly Vo lt a g e V
VDDR_ d c
–60mV
VDDR_ d c
VDDR_ d c +
60mV
2, 3
VDDA VDDA Supply Voltage V 2.40 2.50 2.60
IDDIO1
VDDIO Power Supply
Current
A3.607, 9
IDDR
VDDR Power Supply
Current
A 1.75 6, 8, 9
1.40/ link 5, 9
0.65/ link 9,10,11
IDDA
VDDA Power Supply
Current
mA 9
Notes:
4) All voltages are referenced to VSS. Voltage regulator for VDDR must be set accordingly so that VDDR_dc level
be carefully considered and compensated for. For example, if the inaccuracy and IR drop amounts to 50 mV, then
the voltage regulator setting for VDDIO should not be lower than 1.425 V to avoid violating the VDDIO_dc
minimum spec of 1.375 V.
2) VDDIO_ac and VDDR_ac parameters are measured over 60 seconds time frame with all data bus bits switching.
ILDT
8) VDDR current is consumed by I, O, I/O switching current and on-chip functions (PDL, DLL, level-shifters, etc.).
A
1) All voltages are referenced to VSS. In order to ensure proper functionality, DC voltage regulator must be
set accordingly to ensure that VDDIO_dc level measured at the VDDIO_FB_H/L pins does not exceed the
specified maximum and minimum range. As such, factors such as voltage regulator inaccuracy and IR drop must
limits. Factors such as voltage regulator inaccuracy and IR drop must be carefully considered and compensated
measured at the processor with VDDR_SENSE pin stay within the specified maximum and minimum DC tolerance
VLDT Power Supply
Current
f
or to ensure the VDDR stays within the specified DC tolerance limits.
3) Power supply A/C measurements use a 20-MHz scope bandwidth limit.
5) ILDT is specified for one 16x16-bit Gen3 link.
10) ILDT is specified for one 16x16-bit HyperTransport™ link operating at 2.0 GT/s.
12) Tolerances apply to both VLDT_dc and VLDT_ac conditions.
6) VDDR must both sink and source current.
7) VDDIO current is consumed by I, O, I/O switching current and on-chip functions (PDL, DLL, level-shifters, etc.).
9) This specification reflects the values published in the appropriate power roadmap document.
11) Please refer to erratum 396.