Specifications

78 Product Errata
41322 Rev. 3.84 August 2011
Revision Guide for AMD Family 10h Processors
336 Instruction-Based Sampling May Be Inaccurate
Description
The processor may experience sampling inaccuracies when Instruction-Based Sampling (IBS) is
enabled in the following cases:
• The IBS may not tag an operation when the current counter in IBS Execution Control
Register[IbsOpCurCnt] (MSRC001_1033[51:32]) reaches the value in IBS Fetch Control
Register[IbsOpMaxCnt] (MSRC001_1030[15:0], resulting in a missed sample. When this
occurs, the IBS counter rolls over without an interrupt.
• The selection of instructions for IBS may be significantly skewed due to effects of instruction
cache misses and branch prediction. As a result, certain instructions may be tagged less
frequently than other instructions even when executed in the same code block.
Potential Effect on System
Inaccuracies in performance monitoring software may be experienced. Despite this erratum, IBS can
be used effectively for identifying performance issues associated with specific instructions. The
sampling bias makes IBS less effective for measuring statistical distribution of operations and events
across a large code sequence on affected processor revisions.
Suggested Workaround
None.
Fix Planned
Yes