Specifications

Product Errata 67
Revision Guide for AMD Family 10h Processors
41322 Rev. 3.84 August 2011
301 Performance Counters Do Not Accurately Count MFENCE or
SFENCE Instructions
Description
MFENCE and SFENCE instructions are not accurately counted by the performance monitor when
MSRC001_000[3:0][7:0] (EventSelect) is 1D4h, or 1D5h.
Potential Effect on System
Performance monitoring software will not be able to count MFENCE and SFENCE instructions.
Suggested Workaround
None.
Fix Planned
Yes