Specifications

142 Product Errata
41322 Rev. 3.84 August 2011
Revision Guide for AMD Family 10h Processors
610 Processor with Message-Triggered C1E Enabled May Report a
False L3 LRU or Tag Machine Check
Description
During an exit from message-triggered C1E state (LDTSTOP# deassertion) that is less than 10
microseconds after the STOPGRANT message, the processor may report a false uncorrectable
machine check exception for either an L3 LRU or tag error. The false machine check is due to an L3
stutter scrub happening while the L3 clocks are disabled.
L3 stutter scrubs are enabled when Clock Power/Timing Control 0 Register[StutterScrubEn]
(F3xD4[15]) is 1b, and BIOS enables this only when message-triggered C1E is enabled. This erratum
is exposed only when the minimum time from STOPGRANT message to LDTSTOP# deassertion is
violated. However, erratum #669 documents an additional circumstance under which a similar
condition may be observed even when the minimum time from STOPGRANT message to
LDTSTOP# deassertion is not violated. The BIOS and Kernel Developers Guide (BKDG) for
AMD Family 10h Processors, order# 31116 documents a minimum time of 16 microseconds between
these events.
Potential Effect on System
Uncorrectable machine check exception (#MC) for an L3 LRU or tag error. The MC4_STATUS
register (MSR0000_0411) is either FCxx21x0_001D010B or FCxx21x0_001E010B. Bit 62 (error
overflow) and bits 43:42 (L3 subcache) of MC4_STATUS may or may not be set.
This machine check also causes a sync flood and reboot, unless these mechanisms have been
disabled.
Suggested Workaround
BIOS should set F3x1B8[5] = 1b whenever message-triggered C1E is enabled (Clock Power/Timing
Control 0 Register[MTC1eEn], F3xD4[13] = 1b) to remove the conditions under which the improper
scrub can occur. Implementation of this workaround does not alter the required minimum time from
STOPGRANT message to LDTSTOP# deassertion.
Fix Planned
No