Specifications

138 Product Errata
41322 Rev. 3.84 August 2011
Revision Guide for AMD Family 10h Processors
459 DDR3-1333 Configurations with Three DIMMs per Channel May
Experience Unreliable Operation
Description
In systems with three DDR3-1333 registered DIMMs on a channel, the processor memory subsystem
may exhibit unreliable operation over the allowable voltage ranges.
Potential Effect on System
Memory system failure, leading to DRAM ECC machine check errors.
Suggested Workaround
In a configuration where three registered DDR3-1333 DIMMs are populated on one channel, BIOS
should de-rate DDR3-1333 system memory to 533 MHz operation (DDR3-1066) by setting the
DRAM Configuration High Register[MemClkFreq] (F2x[1, 0]94[2:0]) to 100b and adjusting
memory subsystem timing parameters accordingly.
Fix Planned
No