Specifications

Product Errata 123
Revision Guide for AMD Family 10h Processors
41322 Rev. 3.84 August 2011
411 Processor May Exit Message-Triggered C1E State Without an
Interrupt if Local APIC Timer Reaches Zero
Description
If the processor is in the message-triggered C1E state with local APIC Timer Initial Count Register
(APIC380[31:0]) non-zero, and the Timer Current Count Register (APIC390[31:0]) transitions to 0,
the processor will assert IDLEEXIT_L to request an exit from C1E even if the APIC timer interrupt is
masked (Timer Local Vector Table Entry[Mask] (APIC320[16]) is 1b). If the timer interrupt is
masked, the processor then enters the C1 state without an interrupt pending.
Potential Effect on System
This does not cause functional issues but may reduce the power saving effectiveness of message-
triggered C1E mode. This would normally occur only if an operating system that has used the local
APIC timer masks the interrupt without stopping the counter using the Timer Initial Count Register.
Suggested Workaround
When programming APIC320[Mask] to 1b to mask the local APIC timer interrupt, operating system
software should program APIC380[31:0] to 0.
Fix Planned
No