Specifications

108 Product Errata
41322 Rev. 3.84 August 2011
Revision Guide for AMD Family 10h Processors
387 Performance Counters Do Not Accurately Count L3 Cache
Evictions
Description
The processor does not report the correct count of L3 cache evictions when Performance Event Select
Register (PERF_CTL[3:0]) MSRC001_000[3:0][EventSelect] is 4E3h. This erratum applies to all
unit mask settings for this event.
Potential Effect on System
Performance monitoring software will not be able to count L3 cache evictions with this event counter.
Suggested Workaround
Performance monitoring software can use EventSelect 0EAh, UnitMask 01h as an alternate method to
count victim block writebacks.
Fix Planned
No