Specifications

46837 Rev. 1.0 March 2010

SB700 Family Product Errata

Product Errata

5 System Time Lag / Performance Counter Lag When Spread Spectrum is Enabled

Description

SRC_CLK of the external clock generator is a spread-capable PCIe

100 MHz clock which is used by an

internal PLL of the SB7xx to generate a 14 MHz reference system clock. This 14 MHz clock is used

throughout the platform including use by HPET timers for synchronizing the system time in Windows Vista

and CPU TSC (Time Stamp Counter) timers used as performance counters in Windows

7. When this clock

is down spread, the mean frequency will be 99.9975 MHz instead of the nominal 100.00 MHz. When spread

spectrum is enabled on the SRC_CLK output of the external clock generator, time-sensitive system resources

dependent on the HPET timers in the operating system will be adversely affected by a time drift.

Potential Effect on System

In Windows Vista, if HPET is enabled, the system time will lag or lead up to 8 seconds per hour depending on

the application of a negative or positive spread. In the Windows 7 environment, applications that require the

operating system Service of Performance counter may not work properly. One observed failure is a DTM

WLK Revision 1.4 test suite error (“Position Drift and Jitter for AEC (looped streaming”)) that reports a failure

on audio (HD audio or HDMI audio) showing a drift in audio clock.

Suggested Workaround

For platforms supporting Windows Vista, a system BIOS workaround is available that informs the operating

system that the HPET timers are running at a slower reference frequency than normal. Workaround details

are available in section 13.4.1 of the SB7xx BIOS Developer’s Guide (PID # 43366).

For Windows 7 environments, in addition to the workaround described above, a further workaround is required

in order to force the operating system to use the HPET timer for performance counters instead of the CPU

TSC timers. Two options are available to achieve this:

Option 1: An update to the Windows OS Configuration File (Boot.ini Workaround)

The following modification will need to be made by the customer to the Windows configuration file in

the platform OS image using the BCDEDIT utility from a command prompt:

– Bcdedit /set {current} useplatformclock true

Option 2: Platform BIOS Update

A platform BIOS update is required that modifies both the ACPI System Resource Affinity Table

(SRAT) and Maximum System Characteristics Table (MSCT) to specify that each logical processor

has a different clock domain. Details of these workarounds are described in section 13.4.2 of the

SB7xx BIOS Developer’s Guide (PID # 43366) and are required to be implemented for platforms

using revision A12 of the SB700 or SB750.

Fix Planned

This issue is resolved in SB710/SB750 revision A14.