Specifications

© 2008 Advanced Micro Devices Inc.
Sample Programs
AMD SB600 BIOS Developer’s Guide (Public Version) Proprietary
Page 76
Scope(\_SB_.PCI0.SATA) // Bus 0, Device 12h, Function 0
{
OperationRegion(BAR5, SystemMemory, 0xFFF80000, 0x1000) // The
// address should be replaced by the BIOS
Field(BAR5, AnyAcc, NoLock, Preserve)
{
Offset(0x104), // Channel 0
CSTX, 1, // Device detected but no communication with Phy
CST0, 1, // Communication with Phy established. (Physgood)
Offset(0x10A), // Channel 0
STA0, 1, // Change in Phy status
Offset(0x184), // Channel 1
CSTY, 1, // Device detected but no communications with Phy
CST1, 1, // Communication with Phy established (Physgood)
Offset(0x18A), // Channel 1
STA1, 1, // Changes in Phy status
} // End of Field(BAR5 ……)
Method(_INI) { // For Bus 0, Device 12h, Function 0
if(\_SB_.PCI0.SATA.STA0){
store(\_SB_.PCI0.SATA.STA0,\_SB_.PCI0.SATA.STA0) //clear channel
// 0 SATA status
}
if(\_SB_.PCI0.SATA.STA1){
store(\_SB_.PCI0.SATA.STA1,\_SB_.PCI0.SATA.STA1) //clear channel
// 1 SATA status
}
} // End of Method (_INI)
Device(PRID) {
Name(_ADR, 0) // IDE Primary Channel