Specifications

©
2008 Advanced Micro Devices Inc.
Sample Programs
AMD SB600 BIOS Developer’s Guide (Public Version) Proprietary
Page 72
mov dx,0CD6h ; PMIO index
mov al,37h ;
out dx,al ; Set PMIO index
mov dx,0CD7h ; PMIO data
in al,dx ; Read current value
and al,0Feh ; Falling edge trigger (on closing the lid)
out dx,al
; Enable ExtEvent bit in ACPI GPE0 enable block.
mov dx,824h ; GPE0 enable is offset 4 of GPE0 block
in eax,dx ; Read GPE0 block
or eax,0100h ; Set bit 16, ExeEvent0 enable
out dx,eax
; Enable ExtEvent0 to S5 plane. This step is optional as the bit is set by default.
mov dx,0CD6h ; PMIO index
mov al,78h ; S5 plane enable register
out dx,al
mov dx,0CD7h ; PMIO data register
in al,dx ; Read current register
or al,04h ; ExtEvent0 to S5 plane
out dx,al
14.6.4 ACPI Programming
The ASL code defines the following:
The operation region where the lid polarity resides in address space. In our example that
is at PMIO register 37h, bit 0.
A device called \_SB.LID with HID of PNP0C0D.
Method _LID to return current lid status.
A _PRW package that defines wake from S4 states (which includes wake from S1, S3
also).
Event handler _GPE.