Specifications
©
2008 Advanced Micro Devices Inc.
Sample Programs
AMD SB600 BIOS Developer’s Guide (Public Version) Proprietary
Page 71
14.6 Lid Switch
The Lid Switch programming is implementation specific. In a typical implementation the output
of the debounced lid switch is connected to one of the Gevent or GPM pins. The Gevent and
GPM pins can trigger the ACPI event, and the trigger polarity is programmable through the
Southbridge register. The Gevent and GPM pins are in S5 plane and hence can trigger the event
in S5 state.
14.6.1 Lid Switch Hardware Connection
This sample program assumes that the SB600 ExtEvent0 pin is connected to the lid switch.
14.6.2 Associated Registers
The registers associated with ExtEvent0 are:
ExtEvent0 Trigger polarity at PMIO index 37h, bit 0. Set to 1 for rising edge trigger and
clear to 0 for falling edge trigger. (Default = 0)
ExtEvent0 signal to S5 region at PMIO index 78h bit 2. Set to 1 for S5 plane. (Default
=1).
ExtEvent0 set as ACPI function at Device 14h, function 0, register 66h, bit 6. Set to 1 to
enable ExtEvent0 as ACPI function. ExtEvent0 is a multi function pin and it must be set
for the ACPI function.
ExtEvent0 ACPI event enable. This register is part of ACPI GPE0 block. The address is
BIOS implementation specific (refer to PMIO register at index 28h and 29h). For this
sample program, the ACPI GPE0 block starts at 820h. ExtEvent0 is bit 16 of the block.
14.6.3 BIOS Initialization.
The registers must be initialized during the boot up process. The order of initialization is not
critical. The initialization may be done in the BIOS at any stage of the boot up process after
GPE0 block is set in PMIO registers 28h,29h).
; Select EvtEvent0 as ACPI pin by setting device 14h, function 0, register 66h, bit 6 = 1
mov eax,8000A064h ; To access registers 64h-67h
mov dx,0CF8h ; PCI index register
out dx,eax
mov dx,0CFEh ; PCI data register for 66h
in al,dx ; Read current value
or al,40h ; Set bit 6
out dx,al
; Program ExtEvent0 trigger polarity to 0 (falling edge trigger ) to indicate lid open .
; Clear PMIO register 37h, bit 0 = 0










