User`s manual

VIA KT133 ATX MAINBOARD AWARD BIOS

4-9

4.6 ADVANCED CHIPSET FEATURES

Advanced Chipset Features

DRAM Timing By SPD

Disabled Item Help

DRAM Clock 100MHz

SDRAM Cycle Length 3 Menu Level Ø

Bank Interleave Disabled

Memory Hole Disabled

PCI Master Pipeline Req Enabled

P2C/C2P Concurrency Enabled

Fast R-W Turn Around Disabled

System BIOS Cacheable Disabled

Video RAM Cacheable Disabled

AGP Aperture Size 64M

AGP 4X Mode Disabled

AGP Driving Control Auto

AGP Driving Value DA

AGP Fast Write Disabled

K7 CLK_CTL Select Optimal

On Chip USB Enabled

USB Keyboard Support Disabled

OnChip Sound Auto

OnChip Modem Auto

CPU to PCI Write Buffer Enabled

PCI Dynamic Bursting Enabled

PCI Master 0 WS Write Enabled

PCI Delay Transaction Enabled

PCI #2 Access #1 Retry Enabled

AGP Master 1 WS Write Disabled

AGP Master 1 WS Read Disabled

This section allows you to configure the system based on the features of the VIA

KT133 chipset. This chipset manages bus speeds and access to system memory

resources, such as DRAM and the external cache. It also coordinates communications

between the conventional ISA bus and the PCI bus. The default settings have been

chosen because they provide the best operating conditions for your system. So please

do not change the default setting unless you have the enough technical background.