Specifications

E PENTIUM® PRO PROCESSOR AT 150, 166, 180, and 200 MHz
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Table 6. GTL+ Signal Groups DC Specifications
Symbol Parameter Min Max Unit
Notes
V
IL
Input Low Voltage -0.3 V
REF
-0.2 V
1, See Table 8
V
IH
Input High Voltage V
REF
+ 0.2 V
CC
PV
1
V
OL
Output Low Voltage 0.30 0.60 V
2
V
OH
Output High Voltage — — V
See V
TT
max in Table 8
I
OL
Output Low Current 36 48 mA
2
I
L
Leakage Current ±100 µA
3
I
REF
Reference Voltage Current ± 15 µA
4
C
GTL+
GTL+ Pin Capacitance 8.5 pF
5
NOTES:
1. V
REF
worst case, not nominal. Noise on V
REF
should be accounted for.
2. Parameter measured into a 25 Ω resistor to 1.5 V. Min. V
OL
and max. I
OL
are guaranteed by design/characterization.
3. (0 ≤ V
PIN
≤ V
CC
P).
4. Total current for all V
REF
pins. Section 3.1. details the V
REF
connections.
5. Total of I/O buffer, package parasitics and 0.5 pF for a socket. Capacitance values guaranteed by design for all GTL+
buffers.
Table 7. Non-GTL+
1
Signal Groups DC Specifications
Symbol Parameter Min Max Unit Notes
V
IL
Input Low Voltage -0.3 0.8 V
V
IH
Input High Voltage 2.0 3.6 V
V
OL
Output Low Voltage 0.4
0.2
V
V
2
3
V
OH
Output High Voltage N/A N/A V All Outputs Open-Drain
I
L
Input Leakage Current ±100 µA4
C
TOL
3.3 V Tol. Pin Capacitance 10 pF Except BCLK & TCK, 5
C
CLK
BCLK Input Capacitance 9 pF 5
C
TCK
TCK Input Capacitance 8 pF 5
NOTES:
1. Table 7 applies to the 3.3 V tolerant, APIC, and JTAG signal groups.
2. Parameter measured at 4 mA (for use with TTL inputs).
3. Parameter guaranteed by design at 100 µA (for use with CMOS inputs).
4. (0 ≤ Vpin ≤ V
CC
P).
5. Total of I/O buffer, package parasitics and 0.5 pF for a socket. Capacitance values are guaranteed by design.