Specifications

PENTIUM® PRO PROCESSOR AT 150, 166, 180, and 200 MHz E
20
be connected to ground (V
SS
). A resistor must also
be used when tying bi-directional signals to power or
ground. When tying any signal to power or ground, a
resistor will also allow for fully testing the processor
after board assembly.
For unused pins, it is suggested that ~10KΩ resistors
be used for pull-ups (except for PICD[1:0] discussed
above), and ~1KΩ resistors be used as pull-downs.
Never tie a pin directly to a supply other than the
processor’s own V
CC
P supply or to V
SS
.
3.12. Maximum Ratings
Table 3 contains Pentium Pro processor stress
ratings only. Functional operation at the absolute
maximum and minimum is not implied nor
guaranteed. The Pentium Pro processor should not
receive a clock while subjected to these conditions.
Functional operating conditions are given in the AC
and DC tables. Extended exposure to the maximum
ratings may affect device reliability. Furthermore,
although the Pentium Pro processor contains
protective circuitry to resist damage from static
electric discharge, one should always take
precautions to avoid high static voltages or electric
fields.
Table 3. Absolute Maximum Ratings
1
Symbol Parameter Min Max Unit Notes
T
Storage
Storage Temperature -65 150 °C
T
Bias
Case Temperature under Bias -65 110 °C
V
CC
P(Abs) Primary Supply Voltage with respect to
V
SS
-0.5 Operating
Voltage + 1.4
V2
V
CC
S(Abs) 3.3 V Supply Voltage with respect to V
SS
-0.5 4.6 V
V
CC
P-V
CC
S Primary Supply Voltage with respect to
Secondary Supply
-3.7 Operating
Voltage + 0.4
V2
V
IN
GTL+ Buffer DC Input Voltage with
respect to V
SS
-0.5 V
CC
P+ 0.5 but
Not to exceed 4.3
V3
V
IN3
3.3 V Tolerant Buffer DC Input Voltage
with respect to V
SS
-0.5 V
CC
P+ 0.9 but
Not to exceed 4.7
V4
I
I
Maximum input current 200 mA 5
I
VID
Maximum VID pin current 5 mA
NOTES:
1. Functional operation at the absolute maximum and minimum is not implied or guaranteed.
2. Operating voltage is the voltage that the component is designed to operate at. See Table 4.
3. Parameter applies to the GTL+ signal groups only.
4. Parameter applies to 3.3 V tolerant, APIC, and JTAG signal groups only.
5. Current may flow through the buffer ESD diodes when VIH > VCCP+1.1V, as in a power supply fault condition or while
power supplies are sequencing. Thermal stress should be minimized by cycling power off if the V
CC
P supply fails.