Specifications

E PENTIUM® PRO PROCESSOR AT 150, 166, 180, and 200 MHz
111
Unless its outputs are tristated during power-on
configuration, after active-to-inactive transition of
RESET#, the Pentium Pro processor optionally
executes its built-in self-test (BIST) and begins
program execution at reset-vector 0_000F_FFF0H or
0_FFFF_FFF0H.
A.44 RP# (I/O)
The RP# signal is the Request Parity signal. It is
driven by the request initiator in both clocks of the
Request Phase. RP# provides parity protection on
ADS# and REQ[4:0]#. When a Pentium Pro
processor bus agent observes an RP# parity error on
any one of the two Request Phase clocks, it must
assert AERR# in the Error Phase, provided “AERR#
drive” is enabled during the power-on configuration.
A correct parity signal is high if an even number of
covered signals are low and low if an odd number of
covered signals are low. This definition allows parity
to be high when all covered signals are high.
A.45 RS[2:0]# (I)
The RS[2:0]# signals are the Response Status
signals. They are driven by the response agent (the
agent responsible for completion of the transaction at
the top of the In-order Queue). Assertion of RS[2:0]#
to a non-zero value for one clock completes the
Response Phase for a transaction. The response
encodings are shown in Table 55. Only certain
response combinations are valid, based on the
snoop result signaled during the transaction’s Snoop
Phase.
The RS[2:0]# assertion for a transaction is initiated
when all of the following conditions are met:
• All bus agents have observed the Snoop Phase
completion of the transaction.
• The transaction is at the top of the In-order
Queue.
• RS[2:0]# are sampled in the Idle state
The response driven depends on the transaction as
described below:
• The response agent returns a hard-failure
response for any transaction in which the
response agent observes a hard error.
• The response agent returns a Normal with data
response for a read transaction with HITM# and
DEFER# deasserted in the Snoop Phase, when
the addressed agent is ready to return data and
samples inactive DBSY#.
• The response agent returns a Normal without
data response for a write transaction with
HITM# and DEFER# deasserted in the Snoop
Phase, when the addressed agent samples
TRDY# active and DBSY# inactive, and it is
ready to complete the transaction.