Specifications

AMD Geode™ GeodeROM Functional Specification 29
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32087C
06h --- startTest/memSetup Autosize memory controller DIMM1 and DIMM0.
70h memSetup Set the clock drive strength and shift value. Mask the clocks.
72h memSetup Set the data, address, and control drive. Clear reference timer and VGA
wrap.
73h memSetup Initialize register; no DIMMs installed.
74h memSetup Initialize CAS latency.
75h memSetup Begin sizing DIMMs.
76h memSetup Memory Controller enable and perform refresh.
7E memSetup MemSetup complete. Exit
7Fh memSetup memSetup error. Enable the DIMMs and begin an infinite loop toggling all the
data and address lines.
07h --- startTest/memSetUpStack Set up a stack.
90h memSetUpStack Beginning to create the stack.
9Eh memSetUpStack Stack creation succeeded. Exit.
9Fh memSetUpStack Stack creation failure. HLT.
08h --- startTest/memTest Test memory address lines.
B0h memTest Begin testing memory.
BEh memTest Memory test succeeded. Exit.
BFh memTest Memory test failed. Enable the DIMMs and begin an infinite diagnostic loop
toggling all the data and address lines.
09h --- startTest/shadowRom Copy ROM from F000:0000h to RAM at F000:0000h.
0Ah --- startTest/PCIDelay Delay between PCIRST# and first configuration cycle.
0Bh --- startTest/cacheInit Test and initialize cache.
CFh cacheInit Cache initialization failure. HLT.
0Ch --- startTest/northBridgeInit Initialize North Bridge.
E8h northBridgeInit Begin North Bridge register initialization.
0Dh --- startTest/chipsetInit Load Geode South Bridge with values.
E0h chipsetInit Begin initialization process.
E1h chipsetInit Start of a single loop interation.
E2h chipsetInit End of a single loop iteration.
E8h chipsetInit/LPCBusInit LPC Bridge initialization.
EAh chipsetInit/GPIOInit GPIOs initialization.
2Ch chipsetInit/ConfigBaseAddr Configuration base address is invalid. HLT.
2Dh chipsetInit/Id_CPU Invalid crystal in use. HLT.
0Eh --- startTest/sioTest SIO test/initialize.
60h sioTest SIO test entry.
61h sioTest SIO present/register initialize (not SP1SC10 or SP4SC40 boards).
6Ah sioTest ACCESS.bus initialize (SP1SC10 and SP4SC40 boards).
6Eh sioTest SIO test exit.
0Fh --- startTest/pcATjunk Initialize Timer 1, DMA, low 640 KB (including stack), and 2nd MB of RAM.
10h --- startTest/intTable Initialize interrupt table and timer to 18.2 tics/sec. (also clears equipment list
in itable.asm).
16h startTest/BDAInit Initialize the BIOS Data Area (BDA) and XBDA.
11h --- startTest/memInfo Query memory controller for RAM size, and store it.
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Code Function Name Function Description