Specifications

Product Errata 49
Revision Guide for AMD Athlon™ 64 and AMD Opteron™ Processors
25759 Rev. 3.79 July 2009
89 Potential Deadlock With Locked Transactions
Description
Downstream non-posted requests to devices that are dependent on the completion of an upstream
non-posted request can cause a deadlock in the presence of transactions resulting in bus locks, as
shown in the following two scenarios:
1. A downstream non-posted read to the LPC bus occurs while an LPC bus DMA is in progress. The
legacy LPC DMA blocks downstream traffic until it completes its upstream reads.
2. A downstream non-posted read is sent to a device that must first send an upstream non-posted
read before it can complete the downstream read.
In both cases, a locked transaction causes the upstream channel to be blocked, causing the deadlock
condition.
Potential Effect on System
The system fails due to a bus deadlock.
Suggested Workaround
BIOS should set the DisIOReqLock bit (bit 3 in NB_CFG, MSR C001_001F).
Fix Planned
No