Specifications

Product Errata 45
Revision Guide for AMD Athlon™ 64 and AMD Opteron™ Processors
25759 Rev. 3.79 July 2009
83 DC Machine Check Extended Error Code Bit Not Writeable
Description
The extended error code bit in the DC Machine Check Status Register (i.e., bit 16 of MSR 0x0401)
cannot be predictably updated by software. When this register is written, bit 16 may be updated to
either a zero or a one depending on internal processor conditions.
The ability of this register to correctly log and classify machine check errors is not compromised by
this erratum. When an error occurs, all status information (including the extended error code bit) is
captured correctly and is readable by software. The erratum only affects the software writeability of
this bit.
Potential Effect on System
None expected. As described, errors are captured and classified correctly and are software readable.
Since software only interprets the extended error code bit in the context of a valid TLB error, the
inability of software to clear that extended error bit is of no functional consequence.
Suggested Workaround
None required.
Fix Planned
Yes