User Guide

General-Purpose Programming 27
24592—Rev. 3.15—November 2009 AMD64 Technology
Figure 3-3. General Registers in 64-Bit Mode
Figure 3-4 on page 28 illustrates another way of viewing the 64-bit-mode GPRs, showing how the
legacy GPRs overlap the extended GPRs. Gray-shaded bits are not modified in 64-bit mode.
513-309.eps
63 31 15 7 081632
R8
R9
R10
R11
R12
R13
R14
R15
R8W
R9W
R10W
R11W
R12W
R13W
R14W
R15W
R8D
R9D
R10D
R11D
R12D
R13D
R14D
R15D
EAX
EBX
ECX
EDX
ESI
EDI
EBP
ESP
RAX
RBX
RCX
RDX
RSI
RDI
RBP
RSP
AX
AH*
BH*
CH*
DH*
16-bit 32-bit 64-bit
8
9
10
11
12
13
14
15
0
3
1
2
6
7
5
4
register
encoding
zero-extended
for 32-bit operands
not modified for 8-bit operands
not modified for 16-bit operands
BX
CX
DX
SI
DI
BP
SP
63 31 032
RFLAGS
RIP
0
low
8-bit
R8B
R9B
R10B
R11B
R12B
R13B
R14B
R15B
AL
BL
CL
DL
SIL**
DIL**
BPL**
SPL**
* Not addressable when
a REX prefix is used.
** Only addressable when
a REX prefix is used.