User Guide

16 Memory Model
AMD64 Technology 24592—Rev. 3.15—November 2009
Instruction-Relative Addresses—These addresses are given as displacements (or offsets) from the
current instruction pointer (IP), also called the program counter (PC). They are generated by
control-transfer instructions. A displacement in the instruction encoding, or one read from
memory, serves as an offset from the address that follows the transfer. See “RIP-Relative
Addressing” on page 18 for details about RIP-relative addressing in 64-bit mode.
ModR/M Addressing—These addresses are calculated using a scale, index, base, and displacement.
Instruction encodings contain two bytes—MODR/M and optional SIB (scale, index, base) and a
variable length displacement—that specify the variables for the calculation. The base and index
values are contained in general-purpose registers specified by the SIB byte. The scale and
displacement values are specified directly in the instruction encoding. Figure 2-7 shows the
components of a complex-address calculation. The resultant effective address is added to the data-
segment base address to form a linear address, as described in “Segmented Virtual Memory” in
Volume 2. “Instruction Formats” in Volume 3 gives further details on specifying this form of
address. The encoding of instructions specifies how the address is calculated.
Figure 2-7. Complex Address Calculation (Protected Mode)
Stack Addresses—PUSH, POP, CALL, RET, IRET, and INT instructions implicitly use the stack
pointer, which contains the address of the procedure stack. See “Stack Operation” on page 19 for
details about the size of the stack pointer.
String Addresses—String instructions generate sequential addresses using the rDI and rSI registers,
as described in “Implicit Uses of GPRs” on page 30.
In 64-bit mode, with no address-size override, the size of effective-address calculations is 64 bits. An
effective-address calculation uses 64-bit base and index registers and sign-extends displacements to 64
bits. Due to the flat address space in 64-bit mode, virtual addresses are equal to effective addresses.
(For an exception to this general rule, see “FS and GS as Base of Address Calculation” on page 17.)
Long-Mode Zero-Extension of 16-Bit and 32-Bit Addresses. In long mode, all 16-bit and 32-bit
address calculations are zero-extended to form 64-bit addresses. Address calculations are first
+
513-108.eps
*
Effective Address
DisplacementIndex
Scale by 1, 2, 4, or 8
Base