User Guide

Memory Model 15

24592—Rev. 3.15—November 2009 AMD64 Technology

the first (most-significant) byte. In memory, the REX prefix byte (48) would be stored at the lowest

address, and the first immediate byte (11) would be stored at the highest instruction address.

Figure 2-6. Example of 10-Byte Instruction in Memory

2.2.2 64-Bit Canonical Addresses

Long mode defines 64 bits of virtual address, but implementations of the AMD64 architecture may

support fewer bits of virtual address. Although implementations might not use all 64 bits of the virtual

address, they check bits 63 through the most-significant implemented bit to see if those bits are all

zeros or all ones. An address that complies with this property is said to be in canonical address form. If

a virtual-memory reference is not in canonical form, the implementation causes a general-protection

exception or stack fault.

2.2.3 Effective Addresses

Programs provide effective addresses to the hardware prior to segmentation and paging translations.

Long-mode effective addresses are a maximum of 64 bits wide, as shown in Figure 2-3 on page 12.

Programs running in compatibility mode generate (by default) 32-bit effective addresses, which the

hardware zero-extends to 64 bits. Legacy-mode effective addresses, with no address-size override, are

32 or 16 bits wide, as shown in Figure 2-4 on page 13. These sizes can be overridden with an address-

size instruction prefix, as described in “Instruction Prefixes” on page 71.

There are five methods for generating effective addresses, depending on the specific instruction

encoding:

• Absolute Addresses—These addresses are given as displacements (or offsets) from the base address

of a data segment. They point directly to a memory location in the data segment.

513-186.eps

00h

01h

02h

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06h

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09h

High (most-significant)

Low (least-significant)