User Guide

6 Overview of the AMD64 Architecture
AMD64 Technology 24592—Rev. 3.15—November 2009
media instructions. This provides application programs with three distinct sets of floating-point
registers. In addition, certain high-end implementations of the AMD64 architecture may support 128-
bit media, 64-bit media, and x87 instructions with separate execution units.
1.2 Modes of Operation
Table 1-1 on page 2 summarizes the modes of operation supported by the AMD64 architecture. In
most cases, the default address and operand sizes can be overridden with instruction prefixes. The
register extensions shown in the second-from-right column of Table 1-1 are those illustrated in
Figure 1-1 on page 2.
1.2.1 Long Mode
Long mode is an extension of legacy protected mode. Long mode consists of two submodes: 64-bit
mode and compatibility mode. 64-bit mode supports all of the features and register extensions of the
AMD64 architecture. Compatibility mode supports binary compatibility with existing 16-bit and 32-
bit applications. Long mode does not support legacy real mode or legacy virtual-8086 mode, and it
does not support hardware task switching.
Throughout this document, references to long mode refer to both 64-bit mode and compatibility mode.
If a function is specific to either of these submodes, then the name of the specific submode is used
instead of the name long mode.
1.2.2 64-Bit Mode
64-bit mode—a submode of long mode—supports the full range of 64-bit virtual-addressing and
register-extension features. This mode is enabled by the operating system on an individual code-
segment basis. Because 64-bit mode supports a 64-bit virtual-address space, it requires a 64-bit
operating system and tool chain. Existing application binaries can run without recompilation in
compatibility mode, under an operating system that runs in 64-bit mode, or the applications can also be
recompiled to run in 64-bit mode.
Addressing features include a 64-bit instruction pointer (RIP) and an RIP-relative data-addressing
mode. This mode accommodates modern operating systems by supporting only a flat address space,
with single code, data, and stack space.
Register Extensions. 64-bit mode implements register extensions through a group of instruction
prefixes, called REX prefixes. These extensions add eight GPRs (R8–R15), widen all GPRs to 64 bits,
and add eight 128-bit XMM registers (XMM8–XMM15).
The REX instruction prefixes also provide a byte-register capability that makes the low byte of any of
the sixteen GPRs available for byte operations. This results in a uniform set of byte, word, doubleword,
and quadword registers that is better suited to compiler register-allocation.
64-Bit Addresses and Operands. In 64-bit mode, the default virtual-address size is 64 bits
(implementations can have fewer). The default operand size for most instructions is 32 bits. For most