User Guide

296 Index
AMD64 Technology 24592—Rev. 3.15—November 2009
FBSTP instruction ................................................. 264
FCMOVcc instructions........................................... 264
FCOM instruction.................................................. 271
FCOMI instruction................................................. 271
FCOMIP instruction............................................... 271
FCOMP instruction................................................ 271
FCOMPP instruction.............................................. 271
FCOS instruction ................................................... 269
FCW register......................................................... 244
FDECSTP instruction............................................. 273
FDIV instruction.................................................... 268
FDIVP instruction.................................................. 268
FDIVR instruction ................................................. 268
FDIVRP instruction ............................................... 268
feature detection ...................................................... 74
FEMMS instruction ........................................ 209, 233
FERR ................................................................... 289
FFREE instruction ................................................. 273
FICOM instruction................................................. 272
FICOMP instruction............................................... 272
FIDIV instruction .................................................. 268
FIMUL instruction................................................. 267
FINCSTP instruction.............................................. 273
FINIT instruction................................................... 274
FIST instruction..................................................... 264
FISTP instruction................................................... 264
FISTTP instruction ................................................ 264
FISUB instruction.................................................. 267
flags instructions...................................................... 62
FLAGS register ................................................. 25, 33
FLD instruction ..................................................... 263
FLD1 instruction ................................................... 265
FLDL2E instruction ............................................... 266
FLDL2T instruction ............................................... 266
FLDLG2 instruction............................................... 266
FLDLN2 instruction............................................... 266
FLDPI instruction .................................................. 265
FLDZ instruction ................................................... 265
floating-point data types
128-bit media ..................................................... 126
3DNow! ........................................................ 205
64-bit media....................................................... 205
x87.................................................................... 251
floating-point instructions........................................... 5
flush ...................................................................... xxi
flush-to-zero (FZ) bit ............................................. 120
FMUL instruction .................................................. 267
FMULP instruction ................................................ 267
FNINIT instruction ................................................ 274
FNOP instruction................................................... 273
FNSAVE instruction ............................... 223, 234, 276
FPATAN instruction .............................................. 269
FPR0–FPR7 registers ............................................. 240
FPREM instruction................................................. 268
FPREM1 instruction............................................... 269
FPTAN instruction ................................................. 269
FPU control word................................................... 244
FPU status word..................................................... 241
FRNDINT instruction............................................. 268
FRSTOR instruction................................ 223, 234, 276
FS register ............................................................... 17
FSAVE instruction .................................. 223, 234, 276
FSCALE instruction ............................................... 270
FSIN instruction..................................................... 269
FSINCOS instruction.............................................. 269
FST instruction ...................................................... 263
FSTP instruction .................................................... 263
FSUB instruction ................................................... 267
FSUBP instruction ................................................. 267
FSUBR instruction ................................................. 267
FSUBRP instruction ............................................... 267
FSW register.......................................................... 241
FTST instruction .................................................... 272
FTW register ......................................................... 246
FUCOMx instructions ............................................ 272
full................................................................ 232, 246
FXAM instruction .................................................. 272
FXCH instruction................................................... 265
FXRSTOR instruction ..................... 156, 223, 234, 276
FXSAVE instruction ....................... 156, 223, 234, 276
FXTRACT instruction ............................................ 265
FYL2X instruction ................................................. 270
FYL2XP1 instruction ............................................. 270
FZ bit .................................................................... 120
G
general-purpose instructions....................................... 4
general-purpose registers (GPRs) .............................. 23
GPR......................................................................... 3
GPR registers........................................................... 23
GS register .............................................................. 17
H
HADDPD instruction ..................................... 167, 168
HADDPS instruction .............................................. 167
hidden integer bit ............................ 126, 128, 251, 254
HSUBPD instruction .............................................. 168
HSUBPS instruction............................................... 168
I
I/O .......................................................................... 90
address space........................................................ 90
addresses........................................................ 64, 90
instructions........................................................... 63