User Guide

294 Index
AMD64 Technology 24592—Rev. 3.15—November 2009
branches............................................. 76, 84, 101, 189
BSF instruction........................................................ 54
BSR instruction ....................................................... 54
BSWAP instruction.................................................. 48
BT instruction ......................................................... 54
BTC instruction ....................................................... 54
BTR instruction ....................................................... 54
BTS instruction ....................................................... 54
busy (B) bit ........................................................... 244
BX register........................................................ 25, 26
byte ordering ..................................................... 14, 48
byte registers ........................................................... 29
C
C3–C0 bits ............................................................ 243
cache ...................................................................... 96
cachability ......................................................... 190
coherency ............................................................ 98
line...................................................................... 97
management................................................... 66, 99
pollution .............................................................. 98
prefetching........................................................... 99
stale lines........................................................... 100
cache management instructions ................................. 66
CALL instruction.......................................... 60, 69, 79
caller-save parameter passing.................................. 188
canonical address form............................................. 15
carry flag................................................................. 35
CBW instruction...................................................... 46
CDQ instruction ...................................................... 46
CDQE instruction .................................................... 46
CF bit ..................................................................... 35
CH register........................................................ 25, 26
CL register ........................................................ 25, 26
clamping ............................................................... 125
CLC instruction ....................................................... 63
CLD instruction....................................................... 63
clearing the MMX state ........................... 189, 209, 233
CLFLUSH instruction .............................................. 66
CLI instruction ........................................................ 63
CMC instruction ...................................................... 63
CMOVcc instructions............................................... 42
CMP instruction ...................................................... 53
CMPPD instruction................................................ 172
CMPPS instruction ................................................ 171
CMPS instruction .................................................... 57
CMPSB instruction .................................................. 57
CMPSD instruction.......................................... 57, 172
CMPSQ instruction.................................................. 57
CMPSS instruction ................................................ 172
CMPSW instruction ................................................. 57
CMPXCHG instruction ............................................ 65
CMPXCHG16B instruction ...................................... 65
CMPXCHG8B instruction ........................................ 65
COMISD instruction .............................................. 173
COMISS instruction ............................................... 173
commit............................................................. xix, 93
compare instructions........... 53, 153, 171, 220, 228, 270
compatibility mode.............................................. xix, 7
complex address....................................................... 16
condition codes (C3–C0) ........................................ 243
conditional moves ............................................ 42, 264
constants ............................................................... 265
control instructions (x87) ........................................ 273
control transfers ........................................... 16, 58, 76
control word .......................................................... 244
CPUID instruction........................ 65, 74, 176, 229, 278
CQO instruction....................................................... 46
CR0.EM bit ........................................................... 249
CVTDQ2PD instruction.......................................... 139
CVTDQ2PS instruction .......................................... 139
CVTPD2DQ instruction.......................................... 163
CVTPD2PI instruction.................................... 163, 224
CVTPD2PS instruction........................................... 162
CVTPI2PD instruction.................................... 139, 212
CVTPI2PS instruction .................................... 139, 212
CVTPS2DQ instruction .......................................... 163
CVTPS2PD instruction........................................... 162
CVTPS2PI instruction .................................... 163, 224
CVTSD2SI instruction............................................ 164
CVTSD2SS instruction........................................... 162
CVTSI2SD instruction............................................ 140
CVTSI2SS instruction ............................................ 140
CVTSS2SD instruction........................................... 162
CVTSS2SI instruction ............................................ 164
CVTTPD2DQ instruction ....................................... 163
CVTTPD2PI instruction ................................. 163, 224
CVTTPS2DQ instruction........................................ 163
CVTTPS2PI instruction.................................. 163, 224
CVTTSD2SI instruction ......................................... 164
CVTTSS2SI instruction.......................................... 164
CWD instruction ...................................................... 46
CWDE instruction.................................................... 46
CX register ........................................................ 25, 26
D
DAA instruction................................................. 48, 69
DAS instruction ................................................. 48, 69
data conversion instructions 46, 139, 162, 211, 224, 263
data reordering instructions ...................... 140, 165, 212
data transfer instructions ............. 42, 135, 157, 209, 263
data types
128-bit media ..................................................... 121
128-bit media floating-point ................................ 130