User Guide

x87 Floating-Point Programming 289
24592—Rev. 3.15—November 2009 AMD64 Technology
FERR# and IGNNE# Signals. In all unmasked-exception responses, the processor also asserts the
FERR# output signal at the completion o f the instruction that caused the exception. The exception is
serviced at the boundary of the next non-waiting x87 or 64-bit media instruction following the
instruction that caused the exception. (See “Control” on page 273 for a definition of control
instructions.)
System software controls x87 floating-point exception reporting using the numeric error (NE) bit in
control register 0 (CR0), as follows:
• If CR0.NE = 1, internal processor control over x87 floating-point exception reporting is enabled.
In this case, an #MF exception occurs immediately. The FERR# output signal is asserted, but is not
Underflow exception (UE)
• If the destination is memory, set UE and ES flags, and call
the #MF service routine
2
. The destination and the TOP
are not changed.
• If the destination is an x87 register:
- multiply true result by 2
24576
,
- round significand according to PC precision control
and RC rounding control (or round to double-extended
precision for instructions not observing PC precision
control),
- write C1 condition code according to rounding (C1 = 1
for round up, C1=0forround toward zero),
- write result to destination,
- pop or push stack if specified by the instruction,
- set UE and ES flags, and call the #MF service routine
2
.
Precision exception
(PE)
Without overflow or
underflow
Set PE and ES flags, return rounded result, write C1
condition code to specify round-up (C1 = 1) or not round-up
(C1 = 0), and call the #MF service routine
2
.
With masked overflow or
underflow
Set PE and ES flags, respond as for the OE or UE
exception, and call the #MF service routine
2
.
With unmasked overflow
or underflow for register
destination
With unmasked overflow
or underflow for memory
destination
Do not set PE flag, respond to the OE or UE exception by
calling the #MF service routine. The destination and the
TOP are not changed.
Table 6-22. Unmasked Responses to x87 Floating-Point Exceptions (continued)
Exception and
Mnemonic
Type of
Operation
Processor Response
1
Note:
1. For all unmasked exceptions, the processor’s response also includes assertion of the FERR# output signal at the
completion of the instruction that caused the exception.
2. When CR0.NE is set to 1, the #MF service routine is taken at the next non-control x87 instruction. If CR0.NE is
cleared to zero, x87 floating-point instructions are handled by setting the FERR# input signal to 1, which external
logic can use to handle the interrupt.