User Guide

x87 Floating-Point Programming 267
24592—Rev. 3.15—November 2009 AMD64 Technology
• FISUBR—Floating-Point Integer Subtract Reverse
The FSUB instruction syntax has forms that include one or two explicit source operands. In the one-
operand form, the instruction reads a 32-bit or 64-bit floating-point value from memory, converts it to
the double-extended-precision format, subtracts it from ST(0), and writes the result to ST(0). In the
two-operand form, both source operands are located in stack registers. The instruction subtracts the
second operand from the first operand and writes the result to the first operand.
The FSUBP instruction syntax has forms that include zero or two explicit source operands. In the zero-
operand form, the instruction subtracts ST(0) from ST(1), writes t he result to ST(1), and pops the
stack. In the two-operand form, both source operands are located in stack registers. The instruction
subtracts the second operand from the first operand, writes the result to the first operand, and pops the
stack.
The FISUB instruction reads a 16-bit or 32-bit integer value from memory, converts it to the double-
extended-precision format, subtracts it from ST(0), and writes the result to ST(0).
The FSUBR and FSUBRP instructions perform the same operations as FSUB and FSUBP,
respectively, except that the source operands are reversed. Instead of subtracting the second operand
from the first operand, FSUBR and FSUBRP subtract the first operand from the second operand.
Multiplication
• FMUL—Floating-Point Multiply
• FMULP—Floating-Point Multiply and Pop
• FIMUL—Floating-Point Integer Multiply
The FMUL instruction has three forms. One form of the instruction multiplies two double-extended
precision floating-point values located in ST(0) and another floating-point stack register and leaves the
product in ST(0). The second form multiplies two double-extended precision floating-point values
located in ST(0) and another floating-point stack destination register and leaves the product in the
destination register. The third form converts a floating-point value in a specified memory location to
double-extended-precision format, multiplies the result by the value in ST(0) and writes the product to
ST(0).
The FMULP instruction syntax is similar to the form of FMUL described in the previous paragraph.
This instruction pops the floating-point register stack after performing the multiplication operation.
This instruction cannot take a memory operand.
The FIMUL instruction reads a 16-bit or 32-bit integer value from memory, converts it to the double-
extended-precision format, multiplies ST(0) by the memory operand, and writes the result to ST(0).
Division
• FDIV—Floating-Point Divide
• FDIVP—Floating-Point Divide and Pop
• FIDIV—Floating-Point Integer Divide