User Guide

x87 Floating-Point Programming 265
24592—Rev. 3.15—November 2009 AMD64 Technology
Exchange
• FXCH—Floating-Point Exchange
The FXCH instruction exchanges the contents of a specified stack position, ST(i), with the top-of-
stack, ST(0). The top-of-stack pointer is left unchanged. In the form of the instruction that specifies no
operand, the contents of ST(1) and ST(0) are exchanged.
Extract
• FXTRACT—Floating-Point Extract Exponent and Significand
The FXTRACT instruction copies the unbiased exponent of the original value in the top-of-stack,
ST(0), and writes it as a floating-point value to ST(1), then copies the significand and sign of the
original value in the top-of-stack and writes it as a floating-point value with an exponent of zero to the
top-of-stack, ST(0).
6.4.3 Load Constants
Load 0, 1, or Pi
• FLDZ—Floating-Point Load +0.0
• FLD1—Floating-Point Load +1.0
• FLDPI—Floating-Point Load Pi
The FLDZ, FLD1, and FLDPI instructions, respectively, push the floating-point constant value, +0.0,
+1.0, and Pi (3.141592653...), onto the top-of-stack, ST(0).
Load Logarithm
• FLDL2E—Floating-Point Load Log2 e
• FLDL2T—Floating-Point Load Log2 10
Table 6-13. rFLAGS Conditions for FCMOVcc
Condition Mnemonic rFLAGS Register State
Below B Carry flag is set (CF = 1)
Below or Equal BE
Either carry flag or zero flag is set
(CF=1orZF=1)
Equal E Zero flag is set (ZF = 1)
Not Below NB Carry flag is not set (CF = 0)
Not Below or Equal NBE
Neither carry flag nor zero flag is set
(CF=0,ZF=0)
Not Equal NE Zero flag is not set (ZF = 0)
Not Unordered NU Parity flag is not set (PF = 0)
Unordered U Parity flag is set (PF = 1)