User Guide
256 x87 Floating-Point Programming
AMD64 Technology 24592—Rev. 3.15—November 2009
exception is masked. In general, when the processor encounters a QNaN as a source operand for an
instruction—in an instruction other than FxCOMx, FISTx, or FSTx—the processor does not generate
an exception but generates a QNaN as the result.
The processor never generates an SNaN as a result of a floating-point operation. When an invalid-
operation exception (IE) occurs due to an SNaN operand, the invalid-operation exception mask (IM)
bit determines the processor’s response, as described in “x87 Floating-Point Exception Masking” on
page 283.
When a floating-point operation or exception produces a QNaN result, its value is derived from the
source operands according to the rules shown in Table 6-7.
6.3.4 Number Encodings
Supported Encodings. Table 6-8 on page 257 shows the floating-point encodings of supported
numbers and non-numbers. The number categories are ordered from large to small. In this affine
ordering, positive infinity is larger than any positive normalized number, which in turn is larger than
any positive denormalized number, which is larger than positive zero, and so forth. Thus, the ordinary
rules of comparison apply between categories as well as within categories, so that comparison of any
two numbers is well-defined.
The actual exponent field length is 8, 11, or 15 bits, and the fraction field length is 23, 52, or 63 bits,
depending on operand precision.
Table 6-7. NaN Results from NaN Source Operands
Source Operand
(in either order)
1
NaN Result
2
QNaN
Any non-NaN floating-point value
(or single-operand instruction)
Value of QNaN
SNaN
Any non-NaN floating-point value
(or single-operand instruction)
Value of SNaN,
converted to a QNaN
3
QNaN QNaN
Value of QNaN with
the larger significand
4
QNaN SNaN Value of QNaN
SNaN QNaN Value of QNaN
SNaN SNaN
Value of SNaN with
the larger significand
4
Note:
1. This table does not include NaN source operands used in FxCOMx, FISTx, or FSTx
instructions.
2. A NaN result is produced when the floating-point invalid-operation exception is
masked.
3. The conversion is done by changing the most-significant fraction bit to 1.
4. If the significands of the source operands are equal but their signs are different, the
NaN result is undefined.