User Guide

212 64-Bit Media Programming
AMD64 Technology 24592—Rev. 3.15—November 2009
instructions that take 128-bit source operands, see “Data Conversion” on page 139 and “Data
Conversion” on page 162.
Convert Integer to Floating-Point. These instructions convert integer data types into floating-point
data types.
• CVTPI2PS—Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point
• CVTPI2PD—Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point
• PI2FW—Packed Integer To Floating-Point Word Conversion
• PI2FD—Packed Integer to Floating-Point Doubleword Conversion
The CVTPI2Px instructions convert two 32-bit signed integer values in the second operand (an MMX
register or 64-bit memory location) to two single-precision (CVTPI2PS) or double-precision
(CVTPI2PD) floating-point values. The instructions then write the converted values into the low-order
64 bits of an XMM register (CVTPI2PS) or the full 128 bits of an XMM register (CVTPI2PD). The
CVTPI2PS instruction does not modify the high-order 64 bits of the XMM register.
The PI2Fx instructions are 3DNow! instructions. They convert two 16-bit (PI2FW) or 32-bit (PI2FD)
signed integer values in the second operand to two single-precision floating-point values. The
instructions then write the converted values into the destination. If a PI2FD conversion produces an
inexact value, the value is truncated (rounded toward zero).
5.6.5 Data Reordering
The integer data-reordering instructions pack, unpack, interleave, extract, insert, shuffle, and swap the
elements of vector operands.
Pack with Saturation. These instructions pack 2x-sized data types into 1x-sized data types, thus
halving the precision of each element in a vector operand.
• PACKSSDW—Pack with Saturation Signed Doubleword to Word
• PACKSSWB—Pack with Saturation Signed Word to Byte
• PACKUSWB—Pack with Saturation Signed Word to Unsigned Byte
The PACKSSDW instruction converts each 32-bit signed integer in its two source operands (an MMX
register or 64-bit memory location and another MMX register) into a 16-bit signed integer and packs
the converted values into the destination MMX register. The PACKSSWB instruction does the
analogous operation between word elements in the source vectors and byte elements in the destination
vector. The PACKUSWB instruction does the same as PACKSSWB except that it converts word
integers into unsigned (rather than signed) bytes.
Figure 5-12 on page 213 shows an example of a PACKSSDW instruction. The operation merges vector
elements of 2x size (doubleword-size) into vector elements of 1x size (word-size), thus reducing the
precision of the vector-element data types. Any results that would otherwise overflow or underflow are
saturated (clamped) at the maximum or minimum representable value, respectively, as described in
“Saturation” on page 204.