User Guide

128-Bit Media and Scientific Programming 187
24592—Rev. 3.15—November 2009 AMD64 Technology
Unmasked Responses. If the processor detects an unmasked exception, it sets the associated
exception flag in the MXCSR register and invokes the SIMD floating-point exception handler. The
processor does not write a result or change any of the source operands for any type of unmasked
exception. The exception handler must determine which exception occurred (by examining the
exception flags in the MXCSR register) and take appropriate action.
In all cases of unmasked exceptions, before calling the exception handler, the processor examines the
CR4.OSXMMEXCPT bit to see if it is set to 1. If it is set, the processor calls the #XF exception (vector
19). If it is cleared, the processor calls the #UD exception (vector 6). See “System-Control Registers”
in Volume 2 for details.
For details about the operations that can cause unmasked exceptions, see “SIMD Floating-Point
Exception Causes” on page 178 and Table 4-14 on page 185.
Using NaNs in IE Diagnostic Exceptions. Both SNaNs and QNaNs can be encoded with many
different values to carry diagnostic information. By means of appropriate masking and unmasking of
the invalid-operation exception (IE), software can use signaling NaNs to invoke an exception handler.
Within the constraints imposed by the encoding of SNaNs and QNaNs, software may freely assign the
bits in the significand of a NaN. See “Not a Number (NaN)” on page 129 for format details.
For example, software can pre-load each element of an array with a signaling NaN that encodes the
array index. When a n application accesses an uninitialized array element, the invalid-operation
exception is invoked and the service routine can identify that element. A service routine can store
debug information in memory as the exceptions occur. The routine can create a QNaN that references
its associated debug area in memory. As the program runs, the service routine can create a different
QNaN for each error condition, so that a single test-run can identify a collection of errors.
Precision
exception (PE)
Inexact normalized or
denormalized result
Without OE or UE exception Return rounded result.
With masked OE or UE
exception
Respond as for OE or UE
exception.
With unmasked OE or UE
exception
Respond as for OE or UE
exception, and invoke SIMD
exception handler.
Table 4-14. Masked Responses to SIMD Floating-Point Exceptions (continued)
Exception
Operation
1
Processor Response
2
Note:
1. For complete details about operations, see “SIMD Floating-Point Exception Causes” on page 178.
2. In all cases, the processor sets the associated exception flag in MXCSR. For details about number representation,
see “Floating-Point Number Representation” on page 127 and “Floating-Point Number Encodings” on page 130.
3. This response does not comply with the IEEE 754 standard, but it offers higher performance.