User Guide

128-Bit Media and Scientific Programming 179
24592—Rev. 3.15—November 2009 AMD64 Technology
Exception Vectors. The SIMD floating-point exception is listed above as #XF (Vector 19) but it
actually causes either an #XF exception or a #UD (Vector 6) exception, if an unmasked IE, DE, ZE,
OE, UE, or PE exception is reported. The choice of exception vector is determined by the operating-
system XMM exception support bit (OSXMMEXCPT) in control register 4 (CR4):
• When CR4.OSXMMEXCPT = 1, a #XF exception occurs.
• When CR4.OSXMMEXCPT = 0, a #UD exception occurs.
SIMD floating-point exceptions are precise. If an exception occurs when it is masked, the processor
responds in a default way that does not invoke the SIMD floating-point exception service routine. If an
exception occurs when it is unmasked, the processor suspends processing of the faulting instruction
precisely and invokes the exception service routine.
Exception Types and Flags. SIMD floating-point exceptions are differentiated into six types, five
of which are mandated by the IEEE 754 standard. These six types and their bit-flags in the MXCSR
register are shown in Table 4-10. The causes and handling of such exceptions are described below.
The sections below describe the causes for the SIMD floating-point exceptions. The pseudocode
equations in these descriptions assume logical TRUE = 1 and the following definitions:
Max
normal
The largest normalized number that can be represented in the destination format. This is equal to
the format’s largest representable finite, positive or negative value. (Normal numbers are described
in “Normalized Numbers” on page 128.)
Min
normal
The smallest normalized number that can be represented in the destination format. This is equal to
the format’s smallest precisely representable positive or negative value with an unbiased exponent
of 1.
Table 4-10. SIMD Floating-Point Exception Flags
Exception and
Mnemonic
MXCSR Bit
1
Comparable IEEE 754
Exception
Invalid-operation exception (IE) 0 Invalid Operation
Denormalized operation exception (DE) 1 none
Zero-divide exception (ZE) 2 Division by Zero
Overflow exception (OE) 3 Overflow
Underflow exception (UE) 4 Underflow
Precision exception (PE) 5 Inexact
Note:
1. See “MXCSR Register” on page 117 for a summary of each exception.