User Guide

174 128-Bit Media and Scientific Programming
AMD64 Technology 24592—Rev. 3.15—November 2009
Figure 4-37. COMISD Compare Operation
The difference between an ordered and unordered comparison has to do with the conditions under
which a floating-point invalid-operation exception (IE) occurs. In an ordered comparison (COMISS or
COMISD), an IE exception occurs if either of the source operands is either type of NaN (QNaN or
SNaN). In an unordered comparison, the exception occurs only if a source operand is an SNaN. For a
description of NaNs, see “Floating-Point Number Representation” on page 127. For a description of
exceptions, see “Exceptions” on page 177.
4.6.7 Logical
The vector-logic instructions perform Boolean logic operations, including AND, OR, and exclusive
OR.
And
• ANDPS—Logical Bitwise AND Packed Single-Precision Floating-Point
• ANDPD—Logical Bitwise AND Packed Double-Precision Floating-Point
• ANDNPS—Logical Bitwise AND NOT Packed Single-Precision Floating-Point
• ANDNPD—Logical Bitwise AND NOT Packed Double-Precision Floating-Point
The ANDPS instruction performs a logical bitwise AND of the four packed single-precision floating-
point values in the first operand and the corresponding four single-precision floating-point values in
the second operand and writes the result in the destination. The ANDPD instruction performs an
analogous operation on two packed double-precision floating-point values. The ANDNPS and
ANDNPD instructions invert the elements o f the first source vector (creating a one’s complement of
each element), AND them with the elements of the second source vector, and write the result to the
destination.
Or
• ORPS—Logical Bitwise OR Packed Single-Precision Floating-Point
513-161.eps
operand 1
127 0
operand 2
127 0
compare
03163
rFLAGS
0