User Guide

164 128-Bit Media and Scientific Programming
AMD64 Technology 24592—Rev. 3.15—November 2009
the value is rounded, but for the CVTTPS2PI instruction such a result is truncated (rounded toward
zero).
The CVTPD2PI and CVTTPD2PI instructions convert two double-precision floating-point values in
an XMM register or a 128-bit memory location to two 32-bit signed integer values in an MMX register.
For the CVTPD2PI instruction, if the result of the conversion is an inexact value, the value is rounded,
but for the CVTTPD2PI instruction such a result is truncated (rounded toward zero).
Before executing a CVTxPS2PI or CVTxPD2PI instruction, software should ensure that the MMX
registers are properly initialized so as to prevent conflict with their aliased use by x87 floating-point
instructions. This may require clearing the MMX state, as described in “Accessing Operands in
MMX™ Registers” on page 188.
For a description of 128-bit media instructions that convert in the opposite direction—integer in MMX
registers to floating-point in XMM registers—see “Convert MMX Integer to Floating-Point” on
page 139. For a summary of instructions that operate on MMX registers, see Chapter 5, “64-Bit Media
Programming.”
Convert Floating-Point to GPR Integer. These instructions convert floating-point data types in
XMM registers or memory into integer data types in GPR registers.
• CVTSS2SI—Convert Scalar Single-Precision Floating-Point to Signed Doubleword or Quadword
Integer
• CVTSD2SI—Convert Scalar Double-Precision Floating-Point to Signed Doubleword or
Quadword Integer
• CVTTSS2SI—Convert Scalar Single-Precision Floating-Point to Signed Doubleword or
Quadword Integer, Truncated
• CVTTSD2SI—Convert Scalar Double-Precision Floating-Point to Signed Doubleword or
Quadword Integer, Truncated
The CVTSS2SI and CVTTSS2SI instructions convert a single-precision floating-point value in the
low-order 32 bits of an XMM register or a 32-bit memory location to a 32-bit or 64-bit signed integer
value in a general-purpose register. For the CVTSS2SI instruction, if the result of the conversion is an
inexact value, the value is rounded, but for the CVTTSS2SI instruction such a result is truncated
(rounded toward zero).
The CVTSD2SI and CVTTSD2SI instructions convert a double-precision floating-point value in the
low-order 64 bits of an XMM register or a 64-bit memory location to a 32-bit or 64-bit signed integer
value in a general-purpose register. For the CVTSD2SI instruction, if the result of the conversion is an
inexact value, the value is rounded, but for the CVTTSD2SI instruction such a result is truncated
(rounded toward zero).
For a description of 128-bit media instructions that convert in the opposite direction—integer in GPR
registers to floating-point in XMM registers—see “Convert GPR Integer to Floating-Point” on
page 140. For a summary of instructions that operate on GPR registers, see Chapter 3, “General-
Purpose Programming.”